Lsi Logic Corporation

Lsi Corporation

Harminder S Banwait

Eric C Pearson

Michael D Gallant

Jamal Benzreba

Scott F James

An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to present a video signal and macroblock data in response to decoding one or more bins on a binary signal. The second circuit may be configured to, in parallel (i) generate the binary signal in response to a bitstream signal and an initial context information and (ii) calculate subsequent context information.

Context adaptive binary arithmetic decoding for high definition video

A circuit generally having a first module, a second module and a third module is disclosed. The first module may be configured to (i) generate a plurality of parsed residual blocks by parsing an 8&#xd7;8 CABAC (context-based adaptive binary arithmetic coding) residual block received in an input signal and (ii) generate a plurality of metric signals resulting from the parsing of the 8&#xd7;8 CABAC residual block. The second module may be configured to generate a scanning position signal based on the metric signals. The third module may be configured to generating a plurality of 4&#xd7;4 CAVLC (context-based adaptive variable length coding) residual blocks in an output signal by sub-sampling the parsed residual blocks based on the scanning position signal.

Efficient 8&#xd7;8 CABAC residual block decode

An apparatus generally having a reference memory and a motion estimation circuit is disclosed. The reference memory may store reference samples used in a motion estimation of a current block beyond a boundary of a picture. The motion estimation circuit may (i) buffer the reference samples as copied from the reference memory, the reference samples as buffered residing both (a) inside the boundary and (b) inside a search window of the motion estimation, (ii) shift a sub-set of the reference samples to align with a corner of a sub-window, the sub-window being (a) completely within the search window and (b) at least partially outside of the boundary, (iii) fill an empty portion of the sub-window with copies of the reference samples within the sub-set and (iv) generate difference values by comparing the current block against the reference samples within the sub-window a plurality of times.

Supporting motion vectors outside picture boundaries in motion estimation process

A method for controlling an arithmetic codec context is disclosed. The method may include the steps of (A) reading a current value indicating one of a first condition and a second condition corresponding to a current context of a plurality of predetermined contexts, (B) generating an input state matching (i) an initial state in response to the first condition and (ii) an output state in response to the second condition, wherein the initial state has a predetermined value and the output state has a value generated by the method before receiving the current context and (C) generating a current output state by performing an arithmetic code operation on an input signal using the input state.

Low overhead context intializations for arithmetic video codecs

An apparatus generally having a first memory and a circuit is disclosed. The first memory may be used for a motion estimation of a current block. The circuit may be configured to (i) determine if a search window for the current block is at least partially outside a boundary of a picture stored in a second memory, (ii) copy a first plurality of reference samples in the search window from the second memory to the first memory and (iii) map a plurality of reads from the first memory for a plurality of pad samples to the reference samples in the first memory, where the pad samples are determined to be outside the boundary.

An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate context information in response to one or more bins on a binary signal. The second circuit may be configured to generate the binary signal in response to (i) one or more input bits on a bitstream signal, and (ii) simultaneously performing in a single cycle (a) an arithmetic decode of the context information and (b) a renormalization of the context information.

Arithmetic decode without renormalization costs

A circuit generally including a first module, a second module and a third module is disclosed. The first module may be configured to (i) generate a plurality of parsed residual blocks by parsing a plurality of 4&#xd7;4 CAVLC (context-based adaptive variable length coding) residual blocks received in an input signal and (ii) generate a plurality of metric signals resulting from the parsing of the 4&#xd7;4 CAVLC residual blocks. The second module configured to generate a plurality of scanning position signals based on the metric signals. The third module configured to generating an 8&#xd7;8 CABAC (context-based adaptive binary arithmetic coding) residual block in an output signal by up-sampling the parsed residual blocks based on the scanning position signals.

Efficient 8&#xd7;8 CABAC residual block transcode system

An apparatus comprising a first circuit, a second circuit and an output circuit. The first circuit may be configured to generate (i) one of a first set of entropy coded input signals or a second set of entropy coded input signals and (ii) a data path signal. The second circuit may be configured to generate (i) a first set of entropy encoded output signals in response to decoding the second set of entropy coded input signals, or (ii) a second set of entropy coded output signals in response to decoding the first set of entropy coded input signals. The second circuit may provide real time decoding and encoding on a macroblock basis. The output circuit may be configured to present an output signal in response to (i) one of the first set of entropy coded output signals or the second set of entropy coded output signals and (ii) the data path signal.

Method and/or apparatus for transcoding between H.264 CABAC and CAVLC entropy coding modes

An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a plurality of signals in response to one or more of a context index and a binary symbol. The second circuit may be configured to generate a series of output bits in response to the plurality of signals. The memory may be configured to transfer the plurality of signals between the first circuit and the second circuit.

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Waterloo, Canada

Harminder S Banwait