Johnstech International Corporation

Harlan Faller

Jeffrey C Sherry

David A Johnson

Sarosh M Patel

Brian Warwick

John Bucher

Jay Drescher

The IC test system provides a system and method for thermal management of test pins. A test pin array () in a pin guide () is mounted in a retainer () which is located between an IC wafer () which contains IC devices to be tested (DUT) and a load board () which provides pathways to test signals to the DUT. On the other side of the load board is a contact plate () which together with the retainer straddles the load board. Leg extensions () pass through the load board apertures () and provide a thermal circuit from the contact plate to the retainer and to the pin array. On the upper side of the contact plate is a cooling/heating system with a thermal electric peltier device () and a further heat exchanger () as needed. Holes () are provided in the legs () to provide a supply of dry air to the wafer and pin array to minimize condensation as a result of cooling effects.

Growing community of inventors

St. Anthony, MN, United States of America

Harlan Faller