Advanced Micro Devices Corporation

Globalfoundries Inc.

Harish Vasudeva

Kishore Karighattam

Prasad P Padiyar

Hans W Graves

Darrell C Stam

The present invention facilitates network throughput by dynamically generating IPG values, which are employed when recovering from network collisions. Testing a number of IPG values and tracking collisions that occur as a result for each value generate the IPG value. The IPG value that yielded the lowest collisions is then programmed as the IPG value for a network device. This value remains in use by the network device for a stable state time period. After this period, another dynamically generated IPG value is obtained.

Dynamic inter packet gap generation system and method

The present invention facilitates overall system performance by balancing system resource utilization and network throughput. The invention analyzes packets received from host software selects one or more of buffers to coalesce into a single, coalesced buffer. The selection is based upon an initial fragment size selected to facilitate overall system performance. The coalesced buffer and non-coalesced buffers, are passed to a network device for transmission.

Partial coalescing of transmit buffers

A method for optimizing the performance of a media acceleration engine which includes providing input data to a replica of a media acceleration engine wherein the input data including a complete set of media streams, processing the input data via the replica of the media acceleration engine to provide replica output data, providing a subset of the complete set of media streams to a design of the media acceleration engine, simulating the operation of the design of the media acceleration engine using the subset of the complete set of media streams to provide design output data, comparing the replica output data with respective design output data, and comparing the performance of the media acceleration engine when replica output data matches corresponding design output data, is disclosed.

Optimizing decoders on a hardware platform that supports video acceleration

The present invention is a four layer architecture that includes reusable components that can be used in varied operating environments and with varied network devices. The architecture includes an operating system dependent layer, an operating system independent layer, a media independent layer, and a media dependent layer. The operating system dependent layer can vary for differing operating system. In contrast, the operating system independent layer is identical or substantially similar for differing operating systems. Similarly, the media independent layer is identical or substantially similar for different network devices (e.g., a family or group of network devices). The media dependent layer can vary according to differing and varied network devices.

Four layer architecture for network device drivers

A method for verifying operation of a media acceleration engine. The method includes providing input data to a replica of a media acceleration engine wherein the input data including a complete set of media streams, processing the input data via the replica of the media acceleration engine to provide replica output data, providing a subset of the complete set of media streams to a design of the media acceleration engine, simulating the operation of the design of the media acceleration engine using the subset of the complete set of media streams to provide design output data, comparing the replica output data with respective design output data, and verifying the operation of the media acceleration engine when replica output data matches corresponding design output data.

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Austin, TX, United States of America

Harish Vasudeva