Qualcomm Incorporated

Harinder Singh

Sandip HomChaudhuri

Srinivas Katar

Nicholas Kucharewski

Xiaolong Huang

Guido Robert Frederiks

Ahmed Ragab Elsherif

Simon Jan Brand

Murali Krishna

Patrick Poon-Cheuk Chan

Ravi Konda

Douglas Dahlby

BalaSubrahmanyam Chintamneedi

John Thomas Harrsen

Certain aspects of the present disclosure provide an architecture and method for multi-link operation (MLO) at an access point (AP). The method generally includes obtaining a packet from at least one buffer and selecting a processing path, from first and second processing paths, for a packet to be routed from the at least one buffer to at least one of a plurality of radio components for wireless transmission to at least one peer via one or more links, wherein: the first processing path is configured to bind the packet to one of the one or more links based on at least one code-implemented rule, and the second processing path is configured to bind the packet to one of the one or more links based on instantaneous channel sensing.

Flexible multi-link operation architecture

This disclosure provides methods, devices and systems for provisioning resources for wireless communications. Some implementations more specifically relate to provisioning such resources based on a mapping of wireless communication devices to a number of time sectors that occur periodically and do not overlap other time sectors. In some aspects, each wireless stations (STAs) in a basic service set (BSS) may be mapped to a respective time sector based on attributes associated with the BSS so that communications between a STA and its associated access point (AP) can only occur within the respective time sector(s) to which the STA is mapped. In some other aspects, each AP in a multi-AP environment may be mapped to a respective time sector based on attributes associated with the multi-AP environment so that communications between an AP and its associated STAs can only occur within the respective time sector(s) to which the AP is mapped.

Network time sectoring

The disclosure relates to minimizing power consumption of a WiFi system-on-chip (SOC) during idle periods. The disclosed architecture includes memory banks for the WiFi SoC's embedded processor that can be independently powered on/off and a Memory Management Unit (MMU) to translate virtual addresses to physical addresses and generate exceptions to process accesses to virtual addresses without a corresponding physical address. The architecture can implement a demand paging scheme whereby a MMU fault from an access to code/data not within the embedded memory causes the processor to fetch the code/data from an off-chip secondary memory. To minimize page faults, the architecture stores WiFi client code/data within the embedded processor's memory that is repeatedly accessed with a short periodicity or where there is an intolerance for delays of accessing the code/data.

WiFi memory power minimization

Growing community of inventors

Saratoga, CA, United States of America

Harinder Singh