Netlogic Microsystems, Inc

Cypress Semiconductor Corporation

Hari Om

Andrew J Wright

Nabil Masri

Ajay Srikrishna

Steven R Narum

An impedance matching circuit has a reference impedance. A comparator has a first input coupled to a terminal of the reference impedance and has an output. A pull-up counter is coupled to the output of the single comparator.

Impedance matching circuit

A content addressable memory (CAM) device () can provide for suppression of hit indications. Prioritized match indications () can be applied in parallel to both an encoding read-only-memory (ROM) (-) and suppression data store (). A suppression data store () can output suppression bits (SHand SH) that correspond to each CAM entry. Hit indications can be selectively suppressed according the values of suppression bits (SHand SH). Hit suppression methods for a CAM device are also disclosed.

Content addressable memory (CAM) device and method for flexible suppression of hit indications

A CAM device () according to an embodiment can include a control circuit () that can sequentially activate, with dummy operations, an increasingly larger number of CAM blocks (-to-) in response to a start-up circuit () indication until an initial number of CAM blocks is activated. A control circuit () can receive a user configurable block number (USER_BLK) and adjust the number of CAM blocks in a sequentially fashion, with dummy operations, until the user configurable number of CAM blocks is being activated. If a received command is targeted to less than the user configurable block number of CAM blocks, a control circuit () can activate, with dummy operations, an additional number of CAM blocks so that the total number of CAM blocks activate equals the user configurable block number.

Method and apparatus for smoothing current transients in a content addressable memory (CAM) device

A content addressable memory (CAM) device () can include a control block () having a dummy control circuit (). A dummy control circuit () can initiate dummy searches (or other operations) prior to and/or during actual searches to reduce overall supply current transients. Methods for initiating dummy searches are also disclosed.

Method and apparatus for smoothing current transients in a content addressable memory (CAM) device with dummy searches

A content addressable memory (CAM) device () can sequentially apply command and key data to different sections (-to-). Within each section, CAM cores (-to-) can be sequentially activated. Current surges when transitioning from an idle state to an active state, or vice versa, can be significantly reduced with additional latency but no loss in throughput.

Reduced turn-on current content addressable memory (CAM) device and method

A variable impedance output driver has been disclosed. One embodiment of the variable impedance output driver includes a first pull-up structure, a pull-down structure, and a comparator, coupled to the first pull-up structure and the pull-down structure, to calibrate the first pull-up structure and the pull-down structure against a reference impedance. Other embodiments are described and claimed.

Variable impedance output driver

A content addressable memory (CAM) device () can receive a compare data value having a native word size. The compare data value can be split into smaller portions, with one portion can be applied to a first CAM block (-) and another being applied to a second CAM block (-) on a subsequent clock (CAMCLK) cycle. Activation of circuit elements in the second CAM block (-) can be conditioned on first match results (CMATCHAto CMATCHA) generated by first CAM block (-).

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Santa Clara, CA, United States of America

Hari Om