Intel Corporation

Hari Mahalingam

Srinivas V Pietambaram

John Heck

Harel Frish

Kristof Darmawikarta

Srinivas Venkata Ramanuja Pietambaram

Benjamin Duong

Joshua Keener

Pooya Tadayon

Brandon C Marin

Haisheng Rong

Yonggang Li

Leonel R Arana

Jeremy D Ecton

Tarek A Ibrahim

Hiroki Tanaka

Sergei L Sochava

Ling Liao

Changhua Liu

Bai Nie

Kumar Satya Harinadh Potluri

Reece DeFrees

Paul Yu

George A Ghiurcan

Michael E Favaro

Stefan Meister

Wesley Harrison

Eric Snow

Sean McCargar

Shane Yerkes

Pegah Seddighian

Randal Appleton

Jeremy Hicks

Christopher Seibert

An electro-optical system having one or more electro-optical devices integrally formed within a substrate and associated methods are disclosed. An electro-optical system including an electro-optic switch is shown. An electro-optical system including an electro-optic modulator is shown. An electro-optical system including an optical resonator is shown.

Glass interposer optical switching device and method

Various embodiments disclosed relate to photonic assemblies. The present disclosure includes methods for packaging a photonic assembly, including attaching a bridge die to a glass substrate, attaching an electronic integrated circuit die to the glass substrate and the bridge die, attaching a photonic integrated circuit die to the glass substrate and the bridge die, bonding a coupling adapter to the glass substrate and in situ forming a waveguide in the coupling adapted, the waveguide aligning with the photonic integrated circuit die.

Die last and waveguide last architecture for silicon photonic packaging

Systems and methods for testing a photonic IC (PIC) with an optical probe having an out-of-plane edge coupler to convey test signals between the out-of-plane probe and an edge coupled photonic waveguide within a plane of the PIC. To accommodate dimensions of the optical probe, a test trench may be fabricated in the PIC near an edge coupler of the waveguide. The optical probe may be displaced along one or more axes relative to a prober to position a free end of the prober within the test trench and to align the probe's out-of-plane edge coupler with an edge coupler of a PIC waveguide. Accordingly, a PIC may be probed at the wafer-level, without first dicing a wafer into PIC chips or bars. The optical probe may be physically coupled to a prober through a contact sensor to detect and/or avoid physical contact between probe and PIC.

Contactless optical probing of edge-coupled photonic ICs

Silicon photonic integrated circuit (PIC) on a multi-zone semiconductor on insulator (SOI) substrate having at least a first zone and a second zone. Various optical devices of the PIC may be located above certain substrate zones that are most suitable. A first length of a photonic waveguide structure comprises the crystalline silicon and is within the first zone, while a second length of the waveguide structure is within the second zone. Within a first zone, the crystalline silicon layer is spaced apart from an underlying substrate material by a first thickness of dielectric material. Within the second zone, the crystalline silicon layer is spaced apart from the underlying substrate material by a second thickness of the dielectric material.

Silicon photonic integrated circuits on substrates with structured insulators having specific thicknesses in separate zones

Embodiments of the present disclosure are directed to low numerical aperture (NA) optical couplers, or spot size converters, that include a lateral taper section and/or a vertical adiabatic taper section. In embodiments, the optical couplers may be positioned on a silicon substrate proximate to V-grooves within the substrate to contain optical fibers to self-align and to couple with the optical couplers. Other embodiments may be described and/or claimed.

Multi-layer silicon photonics apparatus

Embodiments of the present disclosure are directed toward techniques and configurations for an optical coupler including an optical waveguide to guide light to an optical fiber. In embodiments, the optical waveguide includes a tapered segment to propagate the received light to the optical fiber. In embodiments, the tapered segment is buried below a surface of a semiconductor substrate to transition the received light within the semiconductor substrate from a first optical mode to a second optical mode to reduce a loss of light during propagation of the received light from the optical waveguide to the optical fiber. In embodiments, the surface of the semiconductor substrate comprises a bottom planar surface of a silicon photonic chip that includes at least one or more of passive or active photonic components. Other embodiments may be described and/or claimed.

Optical device including buried optical waveguides and output couplers

In various embodiments, optical fibers may be placed into V-shaped grooves in a substrate. A lid may then be placed on top of the optical fibers to hold them accurately in place, and the lid may be attached to the substrate using a reflow solder technique. Epoxy may then be applied as a strain relief. Because the V-shaped grooves and optical waveguides are manufactured with precision on the same substrate, precise alignment between these two may be achieved. Because the epoxy is applied after reflow, the epoxy may not be exposed to reflow temperatures, which might otherwise cause the epoxy to distort during the cure process.

Reflow compatible optical packaging

Growing community of inventors

San Jose, CA, United States of America

Hari Mahalingam