Texas Instruments Incorporated Deutschland, Gmbh

Texas Instruments Corporation

Harald Sandner

Hans Schmeller

Christophe Vaucourt

Martin Rommel

Helmut Kiml

Joerg Erik Goller

Harald Parzhuber

Ajaib Hussain

Alexander Wormer

Helmut Kimi

A method is provided for driving a plurality of light emitters in a plurality of output paths with each output path including at least one light emitter. The method includes the steps of applying a supply voltage level to a plurality of output paths; generating a current for each path during a period of a predetermined length for the output path; sensing a current level for each output path during the period; comparing each sensed current level with a reference level; increasing the supply voltage level if the sensed current level is lower than the reference level; determining a lowest supply voltage level for the worst case output path; and using the lower supply voltage level as a common supply voltage level for all output paths.

LED driver with adaptive algorithm for storage capacitor pre-charge

A method for driving a light-emitting semiconductor is provided. A supply voltage is converted into a secondary output voltage for supplying the light-emitting semiconductor with an output voltage. A level for the supply voltage at the beginning of a high current phase of the light-emitting semiconductor is sensed. A threshold voltage level for the supply voltage level is determined based on the sensed level. The high current phase with the light-emitting semiconductor is stated. The sensed level is continuously compared with the threshold voltage level, and an output current through the light-emitting semiconductor is controlled such that the sensed level does not drop below the threshold voltage level.

Adaptive algorithm for camera flash LED power control vs. battery impedance, state of discharge (SOD), aging, temperature effects

A heterodyne receiver comprising a gain controllable RF mixer () which has a first input connected to a first local oscillator () and a second input connected to an RF input. The receiver comprises a peak detector () which detects a peak value of an input signal at the second input of the HF mixer and generates a digital control signal if it is determined that the peak value of the input signal is above a predetermined level. A digital automatic gain control circuit () decreases upon reception of the digital control signal the gain of the RF mixer.

Heterodyne receiver

A phase locked loop has a digitally controlled oscillator (DCO) for generating a DCO output signal (f), a clock divider coupled to the DCO and receiving the DCO output signal and outputting a feedback clock signal (f), and a phase frequency detector (PFD) coupled to the DCO and controlling the DCO by a DCO control signal (d). The PFD has a first input for receiving the feedback clock signal (f), a second input for receiving a reference clock signal (f), and comprises a frequency detection stage (FD) adapted to calculate a frequency difference between the feedback clock signal (f) and the reference clock signal (f) in a frequency detection mode and to adjust the DCO control signal based on said frequency difference, a phase detection (PD) stage for calculating a phase error between the feedback clock signal and the reference clock signal in a phase detection mode, and a switch for switching between the frequency detection mode and the phase detection mode upon the frequency of the feedback clock signal reaching a predetermined value.

Phase locked loop with two-step control

The present invention relates to an electronic transmitter for serially transmitting bit sequences. The electronic transmitter includes a detection deviceand a transmitting deviceThe detection deviceis adapted to detect a predefined bit sequence for transmittal. The predefined bit sequence is susceptible to inter-symbol-interference. The transmitting deviceis adapted to transmit serially the detected predefined bit sequence in such a way, that a duration for transmittal of a particular bit in said predefined bit sequence is longer than a duration of transmittal of remaining bits in said predefined bit sequence.

Method of transmitting serial bit-stream and electronic transmitter for transmitting a serial bit-stream

An all digital PLL system generates an analog oscillator signal at intermediate frequencies to achieve averaged oscillator frequencies at an extremely high frequency resolution. The PLL system includes a digitally controlled oscillator () with a digital control input and an analog signal output, and a feedback loop with a digital loop filter () for generating a digital control signal for the digitally controlled oscillator (). The digital loop filter () has a first output providing an integer part (n) of the digital control signal and a second output providing a fractional part (n) of the digital control signal. A sigma-delta modulator () has an input connected to the second output of the digital loop filter () and an output providing a one-bit digital output signal (&#x3a3;&#x394;), and a digital adder () has a first input connected to the first output of the digital loop filter (), a second input connected to the output of the sigma-delta modulator (), and an output connected to the digital control input of the digitally controlled oscillator (). The output of the sigma-delta modulator () modulates the least significant bits from the first output of the digital loop filter ().

Growing community of inventors

Marzling, Germany

Harald Sandner