U.S. Philips Corporation

Harald Godon

Trung Tri Doan

Leendert De Bruin

Andre Stolmeijer

Malcolm K Grief

Alexander G Jonkers

Christopher A Seams

Disclosed is a method of contacting a metal silicide pattern on an integrated semiconductor circuit which is provided with a planarized dielectric layer. A silicide-forming metal layer (9), preferably a titanium layer, is provided on the surface of a silicon substrate having a field oxide patter (2) which is provided with a conductor pattern (4) of silicon. A layer (10) of amorphous (a-) silicon is provided locally on this metal layer to form 'straps'. The entire device is heated in a nitrogen-containing atmosphere, by which the metal layer (9) is converted at least partly into metal silicide (12). A dielectric layer (13), for example of silicon oxide, is provided over the entire surface. The layer (13) is planarized and provided with contact windows (15) on the metal silicide by etching, after which a metallization (16) is provided. According to the invention, the amorphous silicon layer is provided not only at the locations of the 'straps', but also under at least those contact windows which are situated above the silicon pattern (4), and preferably below all contact windows, so that a thicker silicide layer (12B) is realized below these windows and partial or substantial removal by etching of the metal silicide in the 'shallow' contact windows is prevented.

Method of contacting silicide tracks

A method of the kind consisting in that a contact is obtained with an active zone (11) carried by a semiconductor substrate (10) by means of conductive contact studs (18a) located in the contact openings (16c) of an isolating layer (12) and in that then a metallic configuration of interconnections (22) is formed establishing the conductive connection with the conductive contact studs (18a). A separation layer (13) is provided between the isolating layer (12) and the conductive layer (18), which can be eliminated selectively with respect to the isolating layer (12). Thus, the isolating layer (12) retains its original flatness and the conductive contact studs (18a) have an upper level (20) exceeding slightly the level (21) of the isolating layer (12), thus favoring the contact between these contact studs (18a) and the metallic configuration of interconnections (22). Application in microcircuits having a high integration density.

Method of forming a configuration of interconnections on a semiconductor

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Tornesch, Germany

Harald Godon