Qualcomm Incorporated

Marvell Asia Pte., Ltd.

Haobo Yu

Adil Jagmag

Tauseef Kazi

Gaurav Arora

Pontus Evert Lidman

Lukai Cai

Viraphol Chaiyakul

Mahesh Sridharan

Yongbing Chen

Yongsen Chen

Ailing Du

Systems, methods, and other embodiments associated with handling secure interrupts between security zones are described. According to one embodiment, an apparatus includes a memory divided between a secure zone and a non-secure zone and storing a plurality of applications. The secure zone provides exclusive access to secure assets of the apparatus. A processor with an interface module configured to, in response to receiving an interrupt request from a requesting application that executes on the processor in the non-secure zone, tunnel the interrupt request into the secure zone of the processor. The non-secure zone and the secure zone are configured as operating environments of the processor with separate security controls. The processor includes a monitor module configured to issue the secure interrupt to a trusted application that is one of the plurality of applications in the secure zone, wherein the trusted application is registered to handle the secure interrupt.

Secure interrupt handling between security zones

An apparatus for simulating digital systems is described. The apparatus includes a processor and memory in electronic communication with the processor. Instructions that are executable by the processor are stored in the memory. A simulation tool is started. The simulation tool is capable of simulating a plurality of components. A clock phase is adjusted to be turned off for at least one of the components. A digital system is simulated that includes the at least one component. The simulation does not simulate the clock phase for the at least one component.

Systems and methods for improving digital system simulation speed by clock phase gating

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Haobo Yu