Wenzhou University

Hao Ye

Pengjun Wang

Gang Li

Xiangyu Li

Ziyu Zhou

Bo Chen

Hui Li

Li Ni

Xilong Shao

Yijian Shi

Yuanfeng Xie

Xu Dong Wu

Cai Long Jin

Xiao Wei Zhang

A reconfigurable PUF with two PUF functions comprises 2×n PUF cells, a sequential control module, a row selection module, n amplification modules, n first bit lines, and n second bit lines. Each of the 2×n PUF cells comprises a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a fifth NMOS transistor, a sixth NMOS transistor and a seventh NMOS transistor. The PUF cells can provide two independent responses, and can operate in a SRAM mode and an inverter mode. Therefore, the reconfigurable PUF with two PUF functions can operate both in the SRAM mode and the inverter mode, and a PUF operating mode with higher reliability is selected for generating final responses.

Reconfigurable PUF with two PUF functions

A signal processing circuit for a tunneling magnetoresistance sensor comprises thirty-eight MOS transistors, two capacitors and ten switches. A first switch, a second switch, a third switch, a fourth switch, a first MOS transistor, a second MOS transistor, a third MOS transistor and a fourth MOS transistor form a high-frequency modulation circuit. A fifth switch, a sixth switch, a seventh switch, an eighth switch, a seventeenth transistor, a twenty-second MOS transistor and a twenty-third MOS transistor form a high-frequency demodulation circuit. A signal output by a tunneling magnetoresistance sensor is modulated to a chopping frequency by the high-frequency modulation circuit, and is then demodulated by the high-frequency demodulation circuit.

Signal processing circuit for tunneling magnetoresistance sensor

A readout circuit for a high-precision vibration sensor comprises an on-chip self-test circuit, a low-noise charge amplifier, a correlated double sampling circuit, a PID feedback control circuit, a phase compensation circuit and Sigma-Delta. A self-test signal is amplified by the low-noise charge amplifier, low-frequency noise and offsets are filtered out by the correlated double sampling circuit, then a self-test path and a working path of a vibration sensor are separated in the time domain by the PID feedback control circuit, the phase compensation circuit performs zero compensation and pole compensation on the signal, and Sigma-Delta converts an analog signal into a high-precision digital signal.

Readout circuit for high-precision vibration sensor

A device encrypted authentication method based on a strong physical unclonable function is disclosed, including: generating β matrixes formed by random transformation of a ┌√{square root over (b)}┐-order unit matrix, such that unnecessary device expenditure is reduced; when a sensing device is identified, information to be synchronized between the sensing device and a back-end server is transmitted in the registration phase, such that an attacker cannot obtain confidential information in the encryption phase, and the attacker cannot traverse or completely crack all these possible combinations in a short time; even if the attacker intercepts some CRPs, it is scarcely possible that data sent by the sensing device matches the CRPs collected by the attacker, and with the increase of the number b of bits of challenges and the quick convergence to 0, the accuracy of random guessing is only 50%.

Device encrypted authentication method based on strong physical unclonable function and device encrypted authentication system using the same

The present invention discloses a highly reliable positive-to-negative voltage conversion circuit, including a first inverter, a first buffer, a second buffer, a first to seventh NMOS transistors, a first to third PMOS transistors, a first resistor, a second resistor, a third resistor, and a fourth resistor, wherein the third PMOS transistor, the third NMOS transistor, the fourth NMOS transistor, the fifth NMOS transistor, the sixth NMOS transistor and the seventh NMOS transistor form an on/off control circuit, with that a power supply path between a positive-voltage power supply terminal and a negative-voltage power supply terminal is physically isolated by the on/off control circuit to eliminate voltage reversing occurring when the positive-voltage power supply terminal and the negative-voltage power supply terminal cannot be synchronized during power-on.

Highly reliable positive-to-negative voltage conversion circuit

A PUF-based magnetometer with a safety protection circuit is provided. The PUF-based magnetometer includes a TMR magnetometer main structure, a control circuit, a column encoder circuit, a row encoder circuit, a multiplexer and a dynamic comparator. The TMR magnetometer main structure includes n*n TMR sensors, and the TMR magnetometer main structure can also form a PUF circuit together with a control circuit, a column encoder circuit, a row encoder circuit, a multiplexer and a dynamic comparator to realize a function of a TMR magnetometer. The PUF circuit generates PUF response signals based on random deviations of a TMR sensor fabrication process. The PUF response signals generated by the PUF circuit make it more difficult for attackers to locate specific positions of the TPR sensors, and even make it hard to know the existence of the deviations of the TMR sensors.

PUF-based magnetometer with safety protection circuit

A machine learning attack resistant strong PUF with a dual-edge sampling function comprises switch units, a first arbiter and a second arbiter. The first arbiter is for determining a sequential order of delays at a rising edge of signals input to a first input terminal and a second input terminal of the first arbiter. The second arbiter is for determining a sequential order of delays at a falling edge of signals input to a first input terminal and a second input terminal of the second arbiter. Each switch unit is composed of eight MOS transistors. The strong PUF has a high capacity to resist machine learning attacks and small hardware expenditure through simple structural design of the switch units, realizing machine learning attack resistance and small hardware expenditure at the same time, and generating a large number of challenge response pairs through dual-edge sampling realized by the two arbiters.

Machine learning attack resistant strong PUF with dual-edge sampling function

The invention discloses a challenge screening method for improving the stability of a strong Physical Unclonable Function (PUF). If the stability of the group of challenges (GOCs) is quantized by 1 or 0, the GOCs are defined as stable challenges or unstable challenges respectively; the GOCs and the stability of corresponding responses are defined as a challenge-stability pair (CSP); a machining learning training dataset is constructed through CSPs for obtaining a screening model, to associate the challenge stability with the screening model; during actual application of the strong PUF, the challenge stability of a strong PUF is determined through the screening model, and stable challenges of the strong PUF are screened out to form a stable challenge set, which is input into the strong PUF to extract identity information. The challenge screening method can effectively improve the stability of various strong PUFs and has better effect with external disturbance increasing.

Challenge screening method for improving stability of strong physical unclonable function

A bistable physical unclonable function circuit based on subthreshold leakage current deviation comprises a time sequence control circuit, a decoder, 16 bias voltage converters and a PUF array, wherein the time sequence control circuit is used for generating a precharge signal and an enable signal, the decoder is used for converting an external stimulus signal into 16 decoded signals under the control of the precharge signal and the enable signal, the kbias voltage converter is used for converting the kdecoded signal into a kword line signal which is input to the PUF array, the PUF array is used for generating 16 response signals under the control of the precharge signal and the 16 word line signals, and comprises four PMOS transistors, four NMOS transistors, two two-input NAND gates and sixteen PUF units, and each PUF unit comprises two NMOS transistors.

Growing community of inventors

Zhejiang, China

Hao Ye