Apple Inc.

Au Optronics Corporation

Hao-Lin Chiu

Shih Chang Chang

Chun-Yao Huang

Kyung Wook Kim

Byung Duk Yang

Kwang Soon Park

Szu-Hsien Lee

Shinya Ono

Chun-Nan Lin

Rungrot Kitsomboonloha

Patrick B Bennett

Yih-Chyun Kao

Chin-Wei Lin

Young Bae Park

Ming-Chin Hung

Ivan Knez

Pei-En Chang

Po-Liang Yeh

Shine-Kai Tseng

Young-Jik Jo

Shu-Wei Tsao

Sai-Chang Liu

Jiaxi Hu

Wei Chen

Cheng Kai Chen

Jun Qi

Chaohao Wang

Paolo Sacchetto

Hung Sheng Lin

Hyunwoo Nho

Jie Won Ryu

Sun-il Chang

Yang Li

Shih-Chang Chang

Wei Xiong

Wonjae Choi

Ya-Hsiang Tai

Hyunsoo Kim

Young Cheol Yang

Fenghua Zheng

Kyung-Wook Kim

Howard H Tang

Xinyu Zhu

Shatam Agarwal

Zino Lee

Jin Yan

Gihoon Choo

Jun Jiang

Hassan Edrees

Lu-Sheng Chou

Jiun-Jye Chang

Akira Matsudaira

Wen-I Hsieh

Chi-Jui Lin

Szuhsien Lee

Patrick R Cruce

Pengyu Sun

Fan Zhou

Joonggun Lee

Pei-Yu Hou

Kuan-Da Lin

Peien Chang

Chao-Yu Yang

Shih-Che Huang

Suhwan Moon

Dong-Gwang Ha

A display may include an array of pixels that receive control signals from a chain of gate drivers. Each gate driver may include a number of semiconducting oxide transistors and capacitors. At least some of the semiconducting oxide transistors in the gate driver have bottom gate terminals configured to receive a separately adjustable bottom gate voltage for adjusting the threshold voltage during power on, normal, and power off operations. If desired, each gate driver may be provided with two or more different bottom gate voltages for individually controlling separate portions of the gate driver.

Display having semiconducting oxide gate driver circuitry with adjustable threshold voltage

An electronic device may include an electronic display having a gate-on-array (GOA) that generates gate signals in response to an activation signal, pixels that activate in response to a combination of the gate signals and data signals indicative of image data, and sensing circuitry. The sensing circuitry may measure a characteristic response of a gate signal a characteristic response of one or more pixels, or both and compare the characteristic responses to baselines. The electronic device may also include compensation circuitry that applies a compensation to the activation signal and/or to the image data based on the comparisons between the characteristic responses and the baselines.

Display panel transistor gate-signal compensation systems and methods

A touch screen may be formed from a display and perimeter touch electrodes. Touches detected at one or more of the perimeter touch electrodes can be imputed to touch on a region of the display of the touch screen adjacent to the perimeter touch electrodes. In some examples, the perimeter touch electrodes comprise segmented frit metal arranged around the perimeter of the display (e.g., frit metal used to encapsulate the display). In some examples, the perimeter touch electrodes can be coupled to one or more touch sensing circuits via switching circuitry. In some examples, the switching circuitry can be operated based on control signals shared with the display circuitry.

Touch screen with perimeter touch electrodes

An electronic device may have a display with touch sensors. One or more shielding layers may be interposed between the display and the touch sensors. The display may include transistors with gate conductors, a first planarization layer formed over the gate conductors, one or more contacts formed in a first source-drain layer within the first planarization layer, a second planarization layer formed on the first planarization layer, one or more data lines formed in a second source-drain layer within the second planarization layer, a third planarization layer formed on the second planarization layer, and a data line shielding structure formed at least partly in a third source-drain layer within the third planarization layer. The data line shielding structure may be a routing line, a blanket layer, a mesh layer formed in one or more metal layers, and/or a data line covering another data line.

Data line shielding for electronic device displays with touch sensors

A display may include an array of pixels that receive control signals from a chain of gate drivers. Each gate driver may include a logic sub-circuit and an output buffer sub-circuit. The output buffer sub-circuit may include depletion mode semiconducting oxide transistors with high mobility. The logic sub-circuit may include semiconducting oxide transistors, some of which can be depletion mode transistors and some of which can be enhancement mode transistors with lower mobility. The logic sub-circuit may include at least a carry circuit, a voltage setting circuit, an inverting circuit, a discharge circuit.

Display with hybrid oxide gate driver circuitry having multiple low power supplies

A display includes a plurality of pixels grouped into a plurality of lines of pixels. Each line of pixels of the plurality of lines comprises a group of pixels of the plurality of pixels that are coupled to a common scan line as well and that are coupled to different data lines to individually activate each pixel of the group of pixels. The display also includes a common voltage (VCOM) driving circuit configured to receive a waveform and drive the waveform to the display as a VCOM having a value tailored to an individually activated pixel of the group of pixels.

Dynamic VCOM compensation

A touch sensor panel comprising a first touch node electrode of a plurality of touch node electrodes, the first touch node electrode coupled to a first sense connection comprising a first set of traces, the first sense connection configured to have a first resistance per unit length that varies along a length of the first sense connection, and a second touch node electrode of the plurality of touch node electrodes, the second touch node electrode coupled to a second sense connection comprising a second set of traces, the second sense connection configured to have a second resistance per unit length that varies along a length of the second sense connection differently than the first resistance per unit length varies along the length of the first sense connection. An effective resistance of the first sense connection and the second sense connection are equal.

RC tuning of touch electrode connections on a touch sensor panel

An electronic device may include a display. The display may include display driver circuitry that is configured to provide image data to columns of pixels and gate driver circuitry that is configured to provide control signals to rows of pixels. The display may be operable at a native refresh rate that is equal to the highest refresh rate at which the display has full resolution. The display may also be operable in a high refresh rate mode with a high refresh rate that is twice (or some other scaling factor greater than) the native refresh rate. To enable operation at the high refresh rate mode, vertical resolution of the display may be sacrificed. In other words, rows of pixels may be grouped together into effective rows that are then scanned in sequence. The gate driver circuitry may be formed as thin-film transistor circuitry or from gate driver integrated circuits.

Displays with multiple refresh rate modes

A display may have an array of pixels arranged in rows and columns. Display driver circuitry may be provided along an edge of the display. Data lines that are associated with columns of the pixels may be used to distribute data from the display driver circuitry to the pixels. Gate lines in the display may each have a horizontal straight portion that extends along a respective row of the pixels and may each have one or more non-horizontal segments such as zigzag segments. The non-horizontal portion of each gate line may be connected to the horizontal straight portion of the gate line by a via. The non-horizontal portions may each have portions that are overlapped by portions of the data lines. Dummy gate line structures may be provided on the display that are not coupled to any of the pixels in the display.

Display having gate lines with zigzag extensions

A display may have pixels configured to display images. The pixels may be formed from thin-film transistor circuitry on a substrate. Color filter elements formed from colored polymer such as colored photoimageable polymer may be formed on the substrate. A black matrix formed from black photoimageable polymer may have an array of openings. The colored polymer may have first portions that overlap the black matrix and second portions in the openings that form the color filter elements. In some portions of the pixels, the thin-film transistor circuitry may be interposed between the first portions of the colored polymer and the black matrix. In other portions of the pixels, data lines may be formed that are overlapped by the black matrix and that are interposed between the first portions of the colored polymer and the black matrix.

Liquid crystal display

A display may have an array of pixels arranged in rows and columns. Each pixel may have a transistor for controlling the amount of output light associated with that pixel. The transistors may be thin-film transistors having active areas, first and second source-drain terminals, and gates. Gate lines may be used to distribute gate control signals to the gates of the transistors in each row. Data lines that run perpendicular to the gate lines may be used to distribute image data along columns of pixels. The gate lines may be connected to gate line extensions that run parallel to the data lines. The data lines may each overlap a respective one of the gate line extensions. Vias may be used to connect the gate line extensions to the gate lines. The gate line extensions may all have the same length.

Display having vertical gate line extensions and minimized borders

A display device may include pixels and source lines that provide data line signals to the pixels. The display device may also include gate lines that provide gate signals to switches associated with the pixels. The display device may also include vertical gate lines disposed generally parallel to the source lines and coupled to the gate lines at cross point nodes. The display device may also include compensation lines, such that each compensation line is proximate to a respective vertical gate line. The compensation lines may transmit compensation signals having an opposite polarity as compared to respective gate signals to reduce or eliminate a kickback voltage on at least one of the plurality of pixels.

Gate line layout configuration

A display may have a first stage such as a color liquid crystal display stage and a second stage such as a monochromatic liquid crystal display stage that are coupled in tandem so that light from a backlight passes through both stages. The pixel pitch of the second stage may be greater than the pixel pitch of the first stage to ease alignment tolerances and reduce image processing complexity. The first stage may be provided with straight black masking strips, whereas the second stage may be provided with angled zigzagging black masking strips. The angle of the zigzagging black masking strips and the ratio of the pixel pitch of the second stage to that of the first stage may be selected to maximize optical transmittance while minimizing Moire effects.

Electronic device display with zigzag pixel design

A display device may include a plurality of pixels, a plurality of source lines that may provide a plurality of data line signals to the plurality of pixels, a plurality of gate lines that may provide a plurality of gate signals to a plurality of switches associated with the plurality of pixels, and a plurality of voltage gate lines disposed parallel to the plurality of source lines and coupled to the plurality of gate lines at a plurality of cross point nodes. The plurality of cross point nodes are positioned in a pseudo random order across the display device.

V-gate layout and gate drive configuration

Display having vertical gate line extensions and touch sensor

Growing community of inventors

Campbell, CA, United States of America

Hao-Lin Chiu