Semileds Optoelectronics Co., Ltd.

Semileds Corporation

Semi-photonics Co., Ltd.

Hao-Chun Cheng

Chen-Fu Chu

Feng-Hsu Fan

Wen-Huang Liu

Trung Tri Doan

Chao-Chen Cheng

Jiunn-Yi Chu

Chuong Anh Tran

Jui-Kang Yen

Yuan-Hsiao Chang

Fu-Hsien Wang

Trung-Tri Doan

Hsun-Cheng Chan

A method for fabricating a vertical light-emitting diode (VLED) structure includes the steps of providing a carrier substrate, and forming a semiconductor structure on the carrier substrate having a p-type confinement layer, a multiple quantum well (MQW) layer in electrical contact with the p-type confinement layer configured to emit electromagnetic radiation, and an n-type confinement layer in electrical contact with the multiple quantum well (MQW) layer. The method also includes the steps of removing the carrier substrate using a laser pulse to expose an inverted surface of the n-type confinement layer, and forming a metal contact on the surface of the n-type confinement layer.

Method for fabricating vertical light emitting diode (VLED) structure using a laser pulse to remove a carrier substrate

Flip chip

A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.

Method of fabricating semiconductor die using handling layer

Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.

Method for defining semiconductor devices

A light emitting diode (LED) die includes a first-type semiconductor layer, a multiple quantum well (MQW) layer and a second-type semiconductor layer. The light emitting diode (LED) die also includes a peripheral electrode on the first-type semiconductor layer located proximate to an outer periphery of the first-type semiconductor layer configured to spread current across the first-type semiconductor layer. A method for fabricating the light emitting diode (LED) die includes the step of forming an electrode on the outer periphery of the first-type semiconductor layer at least partially enclosing and spaced from the multiple quantum well (MQW) layer configured to spread current across the first-type semiconductor layer.

Light emitting diode (LED) die having peripheral electrode frame and method of fabrication

A method for fabricating a light emitting diode includes the steps of providing a thermal conductive substrate having an electrical isolation layer, forming an anode via and a cathode via side by side on a first side of the substrate part way through the substrate, forming an anode through interconnect in the anode via and a cathode through interconnect in the cathode via, thinning the substrate from a second side of the substrate to the anode through interconnect and the cathode through interconnect, and mounting a LED chip to the first side in electrical communication with the cathode through interconnect and the anode through interconnect.

Method for fabricating side by side light emitting diode (LED) having separate electrical and heat transfer paths

Methods for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current-guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a substrate) may be provided. For some embodiments, both a current-guiding structure and second current path may be provided.

Method for guiding current in a light emitting diode (LED) device

Techniques for fabricating contacts on inverted configuration surfaces of GaN layers of semiconductor devices are provided. An n-doped GaN layer may be formed with a surface exposed by removing a substrate on which the n-doped GaN layer was formed. The crystal structure of such a surface may have a significantly different configuration than the surface of an as-deposited p-doped GaN layer.

Method to make low resistance contact

Protection for the epitaxial structure of metal devices

A light emitting diode includes a thermal conductive substrate having at least one electrical isolation layer configured to provide vertical electrical isolation and a heat transfer path through the substrate from a front side (first side) to a back side (second side) thereof. The light emitting diode includes an anode having a through interconnect, and a cathode having a through interconnect, which are arranged side by side on the substrate. The light emitting diode also includes a LED chip mounted to the substrate between the anode and the cathode. A method for fabricating the light emitting diode includes the steps of providing a thermal conductive substrate having an electrical isolation layer, forming an anode via and a cathode via side by side on a first side of the substrate part way through the substrate, forming an anode through interconnect in the anode via and a cathode through interconnect in the cathode via, thinning the substrate from a second side of the substrate to the anode through interconnect and the cathode through interconnect, and mounting a LED chip to the first side in electrical communication with the cathode through interconnect and the anode through interconnect.

Side by side light emitting diode (LED) having separate electrical and heat transfer paths

Techniques for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current-guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a substrate) may be provided. For some embodiments, both a current-guiding structure and second current path may be provided.

Vertical LED with current-guiding structure

Wall structures for a semiconductor wafer

LED chip

Systems and methods are disclosed for fabricating a semiconductor light-emitting diode (LED) device by forming an n-doped gallium nitride (n-GaN) layer on the LED device and roughening the surface of the n-GaN layer to extract light from an interior of the LED device.

Growing community of inventors

Donggang, Taiwan

Hao-Chun Cheng