Intel Corproation

Hanumanth Bollineni

Robert P Adler

Husnara Khan

Dhrubajyoti Kalita

Mukesh K Mishra

Snehal Kharkar

Sandhya Seshadri

Ramamurthy Sunder

Wendy Liu

Bindu Lalitha

Satish Venkatesan

Hassan M Shehab

Methods and apparatus relating to subsystem-based System on Chip (SoC) integration are described. In one embodiment, logic circuitry determines one or more components of a subsystem. The subsystem supports an architectural feature to be implemented on a System on Chip (SoC) device. A first interface communicatively couples a first component of the subsystem to a first component of another subsystem. A second interface communicatively couples at least one component of the subsystem to at least one chassis component of the SoC device or communicatively couples the at least one component of the subsystem to at least one non-chassis component of the other subsystem. In an embodiment, components of the subsystem may be packaged such that the packaging generates a reusable collateral that allows for fast integration of all aspects of design in any SoC device with a compatible chassis prior to manufacture.

Subsystem-based SoC integration

Growing community of inventors

Santa Clara, CA, United States of America

Hanumanth Bollineni