Siemens Aktiengesellschaft

Hans-Willi Meul

Thomas Meister

Reinhard J Stengl

Helmut Klose

Hermann Wendt

Wolfgang Hoenlein

Hans-Christian Schaber

A method for the manufacture of a laterally limited single crystal region that is suitable for use as an active part of a transistor, including the steps of: a) providing a substrate made of a single crystal semiconductor material; b) forming a first layer on a surface of the substrate, said first layer being selectively etchable with respect to the substrate; c) forming a second layer on the first layer, the second layer being selectively etchable with respect to the first layer; d) providing an opening in the first and second layers so as to expose an area on the surface of the substrate; e) selectively etching the first layer with respect to the substrate and the second layer so as to provide an undercut between the second layer and the surface of the substrate; f) forming a single crystal region on the exposed surface of the substrate by selective epitaxy: g) doping the second layer such that parts of the second layer adjoining the single-crystal region acting as a channel region form a source region and a drain region; h) producing a gate dielectric at a surface of the single-crystal region; and i) forming a gate electrode that is insulated from the source and drain regions on the gate dielectric.

Method for manufacturing a laterally limited, single-crystal region on a

A method for the manufacture of a laterally limited single crystal region that is suitable for use as an active part of a transistor, including the steps of: a) providing a substrate made of a single crystal semiconductor material; b) forming a first layer on a surface of the substrate, said first layer being selectively etchable with respect to the substrate; c) forming a second layer on the first layer, the second layer being selectively etchable with respect to the first layer; d) providing an opening in the first and second layers so as to expose an area on the surface of the substrate; e) covering surfaces and sidewalls of the second layer with a third layer f) selectively etching the first layer with respect to the substrate and the second layer and the third layer so as to provide an undercut between the second layer and the surface of the substrate; g) forming a single crystal region on the exposed surface of the substrate by selective epitaxy without nucleation occurring at the surface of the third layer; h) forming a collector in the substrate under the single-crystal region; i) forming a base in the single-crystal region; j) doping and configuring the second layer such that it forms a base terminal; and k) forming an emitter above the base.

A bipolar transistor includes insulator structures defining an active transistor zone having a base, an emitter with a side facing away from the base, and a collector with a collector terminal having a side facing away from the base. The insulator structures are disposed on the sides of the emitter and the collector terminal facing away from the base, and the insulator structures limit current flow through the active transistor zone. A process for producing the bipolar transistor includes producing a collector by selective epitaxy on a zone of a substrate surrounded by insulators. A zone for the collector is defined with a spacer technique in the following steps: photolithographically producing a first opening in a first layer exposing a surface of a second layer; including at least one insulation layer in the second layer; producing spacers at edges of the first opening; and etching a second opening in the second layer defining the zone for the collector during selective back-etching of the spacers.

Bipolar transistor with reduced base/collector capacitance

A method for the manufacture of a laterally limited single crystal region that is suitable for use as an active part of a transistor.

For manufacturing an electrically conductive tip composed of a doped semiconductor material, a mask layer is produced on a substrate composed of the semiconductor material. This mask layer contains a material at least at its surface and directly on the substrate whereon the semiconductor material does not grow in a selective epitaxy. An opening wherein the surface of the substrate lies exposed is produced in the mask layer. The electrically conductive tip is produced by a selective epitaxy on the exposed surface of the substrate such that the layer growth in the direction parallel to the surface of the substrate is lower than in the direction perpendicular to the surface of the substrate.

Method for manufacturing an electrically conductive tip composed of a

A bipolar transistor with a collector, a base and an emitter disposed in vertical succession includes a semiconductor substrate, insulating oxide zones disposed in the substrate for separating adjacent transistors, and a buried collector terminal layer at least partly disposed on the insulating oxide zones. An insulator structure laterally surrounding a collector. A subcollector is surrounded by the insulating oxide zones, has the same conductivity type with a lower impedance than the collector, is disposed under the collector and under the insulator structure, and is electrically connected to the collector. The insulator structure covers the buried collector terminal layer, laterally insulates the collector from the buried collector terminal layer, and has lateral surfaces extending inside the insulating oxide regions up to the subcollector. The buried collector terminal layer is in direct contact with the subcollector. The collector is electrically connected to the buried collector terminal layer only through the subcollector. The insulator structure has a contact hole extending to the buried collector terminal layer laterally of the active transistor zone, and a metallization filling the contact hole. A process for producing the bipolar transistor includes producing an insulator structure on a substrate for determining a location for a collector; and producing the collector by selective epitaxy only inside the insulator structure, for laterally insulating the collector with the insulator structure. An integrated circuit and method include such bipolar transistors and CMOS transistors.

CMOS-compatible bipolar transistor with reduced collector/substrate

A method for manufacturing a fully self-adjustsed bipolar transistor in which the emitter zone, the base zone, and the collector zone are aligned vertically in a silicon substrate; the collector is connected by means of a deeply extending terminal in the substrate, the inactive base zone is embedded in an insulating trench to separate the inactive base zone from the collector; the emitter terminal zone is composed of doped polycrystalline silicon and is separated from the inactive base zone by a silicon oxide layer. A fully self-adjusted bipolar transistor is produced wherein the emitter is self-adjusted relative to the base and the base is self-adjusted relative to the insulation. The number of method steps involving critical mask usage is low, and parasitic regions are minimized so that the switching speed of the component is increased. The transistor is used for integrated bipolar transistor circuits having high switching speeds.

Growing community of inventors

Bruckmuehl, Germany

Hans-Willi Meul