Greenpeak Technologies B.v.

Qorvo Us, Inc.

Qorvo International Pte. Ltd.

Hans Van Driest

Bram Van Den Bosch

Anton Willem Roodnat

Wessel Harm Lubberhuizen

Andrew Fort

Cornelis Adrianus Henricus Maria Van Puijenbroek

Jan Hendrik Haanstra

Bram Hugo Bert Van Den Bosch

Wilhelmus Van Hoogstraeten

Andrew David Fort

Cornelis Adrianus Henricus M Van Puijenbroek

Method for receiving data packet transmissions, wherein synchronization with a transmitter is accomplished based on detection of a preamble transmitted by the transmitter. A time multiplexing scheduling of a single hardware receiver arrangement is used, and the time multiplexing scheduling has a main time slot comprising a first listen period and a second listen period following the first listen period. In the first listen period a first type of synchronization detection is executed (e.g. IEEE 802.15.4), and in the second listen period a second type of synchronization detection different from the first type of synchronization detection is executed (e.g. BLE).

Concurrent multi-radio receiver

Phase detector circuitry includes oscillator circuitry, edge detection and correction circuitry, sampler circuitry, and adder circuitry. The oscillator circuitry is configured to provide a sawtooth oscillator signal. The edge detection and correction circuitry is configured to receive an in-phase signal and a quadrature signal, provide an edge detection signal during each edge of the in-phase signal and the quadrature signal, and provide an edge correction signal based on whether the edge is in the in-phase signal or the quadrature signal and whether the edge is a rising edge or a falling edge. The sampler circuitry is configured to sample the sawtooth oscillator signal in response to the edge detection signal. The adder circuitry is configured to subtract the edge correction signal from the sampled sawtooth oscillator signal to provide a phase estimate signal.

Phase detector

Multi-channel listening capable receiver capable of operating on one of K data channels and method of operating such a receiver. A local oscillator () is provided for tuning the receiver () to one of the channels within a channel switching time Ts, as well as a processing unit () arranged to detect a presence of a preamble on the tuned channel. The processing unit () is further arranged to switch over the local oscillator () to a next one of the data channels if no presence of a preamble is detected within a single preamble symbol duration Tp. The channel switching time is a fraction &#x3b2; of a single preamble symbol period Tp. The number of data channels K fulfills the condition K&#x3c;floor (N&#x2212;1&#x2212;(K*&#x3b2;)) to be able to receive all relevant data packets on the K channels, after being triggered by reception of the preamble.

Multi-channel receiver

The present disclosure relates to a frequency locked loop including a frequency detection unit, a local oscillator, and a multi-bit sampler. The frequency detection unit is configured to receive a reference frequency parameter and a sub-sampled frequency parameter, and configured to generate a digital frequency difference, which is a difference indication between the reference frequency parameter and the sub-sampled frequency parameter. The local oscillator is configured to generate an output signal based on the digital frequency difference. The multi-bit sampler is configured to update the sub-sampled frequency parameter by sub-sampling the output signal with N (N&#x3e;=2) sampling-clocks. The N sampling-clocks have a same sampling frequency and are sequentially offset by an equal time delay between adjacent sampling-clocks. The updated sub-sampled frequency parameter monotonically maps an output frequency of the output signal.

Frequency locked loop with multi-bit sampler

A transceiverincludes a frequency synthesizerconfigured to generate an output signalfor use as a carrier signal for transmission and/or a signal with a channel frequency for reception, wherein the frequency synthesizer is a sub-sampling based frequency locked loop frequency synthesizer. The combination of a FLL and sub-sampling allows to obtain a sub-sample based locked loop with a closed loop response similar to a PLL but with improved settling time and improved suppression of high frequency components of the quantization noise due to the sampling process. The transceiver allows to obtain a frequency synthesizer with improved characteristics with respect to at least one of power consumption, locking characteristic, design optimization characteristics compared to non-sub-sampling PLL based frequency synthesizers.

Transceiver

Disclosed is a transceiver including a sub-sampling based frequency synthesizer with a sampling frequency f, configured to generate M different output signalsfor use as a carrier signal for transmission and/or a signal with a channel frequency for reception. M is an integer greater than 4, each output signal has a corresponding predefined frequency. The predefined frequencies are within a frequency band with a predefined bandwidth CFR. CFR is greater than f. The frequency synthesizer includes a frequency shift unit configured for shifting a version of the output signal over a predefined frequency shift fto obtain a frequency shifted signal which is supplied to a sampling unit of the sub-sampling based frequency synthesizer, wherein &#x2212;f/2&#x2266;f&#x2266;+f/2. The frequency shift unit is configured to use for the generation of each of the N different output signals a corresponding predefined frequency shift f.

Transceiver with sub-sampling based frequency synthesizer

A receiver and method for determining a characteristic from an input signal is disclosed. A characteristic is at least one selected from a group comprising preamble detect, frequency offset and timing offset. The input signal comprises an IF frequency fIF and a preamble signal which is a sequence of M similar data symbols. The data symbols have a symbol period SP, and M is an integer greater than or equal to 2. The method comprises: &#x2014;receiving N subsequent samples of the input signal, the N subsequent samples representing a part of the input signal approximating the symbol period SP, &#x2014;rotating N subsequent samples to obtain N rotated symbols; &#x2014;correlating the N rotated symbols with P correlation functions to generate a set of N&#xd7;P correlation values, P being an integer greater than or equal to 2; and, &#x2014;selecting a maximum correlation value from the set of N&#xd7;P correlation values and determining the characteristic. The invention enables to perform an efficient antenna diversity circuit, which can be used for simultaneously timing offset and frequency offset estimation, and preamble detection for both antennae with only one radio unit.

Arrangement for determining a characteristic form of an input signal

A receiver and method for receiving symbols having a symbol period with duration SP comprising. N antenna signals are selected equally in time over a symbol period to obtain a combined antenna signal. An autocorrelation is performed on the combined antenna signal to obtain a combined signal. The combined signal is split into the corresponding antenna signal parts and subjected to an integration function. The output of the integration function is used the select the antenna signal with the best signal quality. The invention enables to perform an efficient antenna diversity circuit, which can partially be used for simultaneously preamble detection and frequency offset estimation.

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The Hague, Netherlands

Hans Van Driest