International Business Machines Corporation

Durr Systems Gmbh

Dürr Systems Ag

Hans Schumacher

Frank Herre

Michael Baumann

Helmut Schettler

Marcus Frey

Thomas Hezel

Alexander Meissner

Jürgen Haas

Detlev Hannig

Rainer Zuehlke

Richard Ostin

Ulrich Olderdissen

Rudolf Brosch

Torsten Block

Einar Endregaard

Stefan Esslinger

Jürgen Jost

Salvador Vergara

Andreas Schaal

Manfred Sandmann

A robot arrangement, for example for a painting booth, and exemplary methods associated with the same, are disclosed. An exemplary robot arrangement may comprise a displacement rail, a plurality of robots, such as painting robots or handling robots, which can be displaced along the displacement rail, and a plurality of energy supply chains. The energy supply chains may supply one of the robots each, and may be associated with said robot, and each of the energy supply chains may run along the displacement rail in a particular track. The energy supply chains which are associated with the robots on the same displacement rail may run in discrete tracks.

Robot arrangement, in particular in a painting booth

Decoding of BCH multiple error correction code codewords with .alpha. as a primitive element of the finite field GF (2.sup.m) is accomplished by generating syndrome subvectors S.sub.1 from all column m-tuple .alpha..sup.k positions and syndrome subvectors S.sub.2 from all column m-tuple .alpha..sup.3K positions, generating a permutation of syndrome subvector S.sub.1 for each bit position on the codeword and then selecting those bit positions K where S.sub.1.sup.3 +S.sub.2 +QK=0 as the bit or bits in error.

Decoding of BCH double error correction - triple error detection

For equalizing the signal delay times of semiconductor chips a digital control circuit is provided on each chip. By altering the supply voltage, the digital control circuit influences the signal delay times. The digital control circuit comprises a comparator circuit where the signal delay of a clock pulse is compared in a chain of inverters with the very precisely defined clock interval. Depending on the result of the comparison, the count of an up-down counter is incremented or decremented by one. The resulting count is decoded and converted into a corresponding voltage for operating the circuits of the semiconductor chip. Subsequently, the above described steps are repeated until the difference .DELTA.t between the arrival of a clock pulse delayed by the chain, and the following undelayed clock pulse approaches zero.

Method and circuitry for equalizing the differing delays of

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Schonaich, Germany

Hans Schumacher