Sun Microsystems, Inc.

Oracle America, Inc.

Hans Rygh

Morten Schanke

Steinar Forsmo

Bjorn Dag Johnsen

Ola Torudbakken

Brian Manula

Ali Bozkaya

Knut Tvete

Ola Tørudbakken

Christopher J Jackson

David Brean

Mathias Hoddevik

Ola Torudbaken

Marius Hansen

Finn Egil Hoeyer Grimnes

An Infiniband port can be provided. The port can have an input buffer for storing received data, a flow control manager operable to detect an available space in the input buffer, and a packet generator operable to generate a flow control packet to advertise available space in the input buffer to a remote device transmitting data for storage in the input buffer. The flow control manager can be operable to trigger the packet generator to generate a flow control packet on the basis of at least one of a timer, a received data quantity characteristic for the input buffer and a buffer utilization characteristic for the input buffer.

Credit announcement

A method of providing switch arbitration for the passing of packets between transmitters and receivers in a switch having a plurality of transmitters and receivers, comprises globally distributing information about buffer contents and packet requests between transmitters and receivers.

Switch arbitration

A switch system comprises a switch matrix providing a configurable, protocol agnostic, packet switching core, the switch matrix providing a non-blocking switch connecting a configurable number of ports together.

Switch matrix

One embodiment of the invention provides a method of operating a switch in a communications network. The method includes storing a set of routings for each port in the switch. When a packet is received at a port in the switch, the set of routings corresponding to the port at which the packet was received is accessed. A port from which to forward the packet from the switch is determined in accordance with the set of routings. The packet is then duly forwarded over the network from the port as determined by the routings.

Switching method and apparatus for use in a communications network

A communications chip having a plurality of ports. Each port is provided with an interface for attachment to an external communications facility to exchange data traffic. There is also a switching matrix for routing data traffic on the chip between the ports. The chip further includes a plurality of logic analyzers. Each logic analyzer is associated with a corresponding one of the ports. Each logic analyzers is operable to monitor data traffic passing through its corresponding port and to trigger on one or more predetermined conditions relating to the monitored data traffic. The chip further includes a control interface to allow reconfiguration of the predetermined conditions for at least one of the logic analyzers.

Communications chip having a plurality of logic analysers

One embodiment of the invention provides a method of operating a switch with cut-through routing in a communications network. The method includes receiving a packet at a first port of the switch and determining a second port of the switch from which the received packet is to be forwarded out over the network. At least one authentication check is performed on the received packet. In general, the switch starts to forward the received packet from the second port prior to complete reception of the packet at the first port. However, this onward transmission is delayed until the authentication check has completed. This ensure that none of the received packet is forwarded from the second port if any authentication check fails.

Switch method and apparatus with cut-through routing for use in a communications network

An Infiniband switch can be provided. The switch can have an input port logic unit for determining an output virtual lane for a received packet and for storing a descriptor of the determined output virtual lane in a packet field not protected by a checksum field of the packet. The switch can also have a routing unit for transferring the received packet to an output port corresponding to the determined output virtual lane. Additionally, the switch can have an output port logic unit for simultaneously checking the integrity of the packet transferred through the routing unit and calculating a new value for the checksum with the descriptor moved to a correct packet field, which field is included in the calculation of the checksum.

VCRC checking and generation

An Infiniband device is provided. The device has a plurality of input/output ports. Each port has associated therewith an input buffer for storage of a packet received at that port. Each port also has associated therewith a plurality of output buffers for storage of a packet transmitted from an input buffer via a switching matrix. Each port is arranged to share its associated plurality of output ports with at least one other port. Each input buffer is also associated with a single output buffer of each shared plurality of output buffers. A packet received at an input buffer is transmitted to all associated output buffers via the switching matrix in parallel with an output buffer select signal. The output buffer select signal is sent to less than all of the associated output buffers, any output buffer not receiving the output buffer select signal is configured to discard the packet transmitted from the input buffer.

Input and output buffering

A buffer architecture enables linked lists to be used to administer virtual output queue buffering. The buffer has three random access memories (RAMs). A data RAM holds data. A free RAM holds a linked list of entries defining free space in the data RAM. Destination RAM holds a linked list of entries defining data in the data RAM to be forwarded to a destination.

Virtual output buffer architecture

An Infiniband device can be provided. The device can have an input port for receiving a packet. The port can be operable to extract a destination descriptor and a quality of service requirement descriptor for the packet and simultaneously to determine an output port of the device for onward transmission of the packet on the basis of the destination descriptor and to determine an output port virtual lane for each output port of the device on the basis of the quality of service requirement descriptor. The port can additionally be operable subsequently to use the determined output port to select between the determined output port virtual lanes.

Service level to virtual lane mapping

A receiver for digital data is provided. The receiver comprises a ring buffer operable to store received data. The receiver also comprises a write pointer controller for the buffer, operable to control the writing of received data into the buffer, and a read pointer controller for the buffer, operable to control the reading of data from the buffer. The receiver further comprises a pointer adjustment controller operable, in response to a detection of a special data indicator, to control at least one of the write pointer controller and the read pointer controller using forward looking operable to foresee a data location within the buffer corresponding to a future read location of the buffer.

Data transfer

A method of using routing tables. In this method, routing differs from ordinary table routing in that the part of a destination address (e.g., DestinationID) used for a table lookup is variable. Networks using the full address space of a network node can be made by partitioning the network topology into several levels, such as a top topology and any number of sub-topologies. With a DestinationID of N&minus;1 bits, a routing table of 2 entries is sufficient to support topologies using the full address space, wherein n<N&minus;1.

Growing community of inventors

Oslo, Norway

Hans Rygh