Siemens Aktiengesellschaft

Infineon Technologies Ag

Siemens Aktiegensellschaft

Hans-Peter Zwicknagl

Helmut Horst Tews

Joachim Hoepfner

Lothar Schleicher

Josef Willer

Jan-Erik M&uuml;ller

Peter Baureis

Elke Schoening

A power transistor cell includes an air bridge and a plurality of individual transistors. Each of the plurality of individual transistors has at least one separate connection contact. Each of the at least one separate connection contact of the plurality of individual transistors is thermally conductively connected to one another through the air bridge forming air bridge connections, which define a contact plane. A surface of the contact plane that contains each connection path between two of the air bridge connections defines a convex region. The air bridge is formed to have, in the contact plane, dimensions that exceed a smallest convex region containing all of the air bridge connections in all directions of the air bridge. Each of the plurality of power transistor cells can be respectively thermally conductively connected to one another through the air bridge to form a block of power transistor cells. The air bridge has a dimension that significantly exceeds the length of the contact fingers in the longitudinal direction of the contact fingers, so that components of the air bridge that are present at the sides of a row of contact fingers can be mounted on metallic connection surfaces or on the substrate surface by conductive contact pillars. The configuration provides good heat dissipation from the individual transistors.

Power transistor cell

A power transistor has a plurality of small emitter-base complexes arranged in an array. These complexes are electrically insulated from the surrounding semiconductor material by separating regions such that for the current supply to the collectors, a joint subcollector layer and thereupon a collector metallization exist outside of the emitter-base complexes and reaching up to the separating regions. The individual emitter-base complexes are electrically connected with each other via strip-shaped base supply lines and strip-shaped emitter supply lines, and also with a base contact surface and an emitter contact surface.

Bipolar transistor for high power in the microwave range

Method for the electrical insulation of a function element on a semiconductor component, wherein the function element is etched into a mesa (9) using a mask (8). A dielectric (10) is then applied surface-wide at least up to the height of the mesa (9). The more deeply disposed portions of this dielectric layer are covered with photoresist (11), and the photoresist (11) is caused to flow by tempering and, thus, is caused to level the surface. Finally, the photoresist (11) and the dielectric (10) are re-etched with the same etching rate until the mesa is uncovered.

Method for the electrical insulation of a circuit function element on a

A planar heterobipolar transistor and its methods for manufacture provide that the transistor has the base-emitter region separated from the collector terminal by a collector parting trench and the parting trench structure may be used to separate the transistor from adjoining function components.

Method of making planar heterobipolar transistor having trenched

A permeable base transistor has an emitter layer or emitter layer sequence composed of a semiconductor material which has a greater energy band gap than a semiconductor material of a base layer. This emitter layer or emitter layer sequence is selectively grown into an opening of the base layer and onto a collector layer situated therebelow.

Permeable base transistor having selectively grown emitter

Method for manufacturing a self-aligned emitter-base complex whereby a sequence of epitaxial layers, which corresponds to the optimal base-emitter layer sequence in the re-etched part of the heterobipolar transistor is grown. Subsequently, the base implantation is introduced using a dummy-emitter as a mask. Using a dielectric mask covering the region not covered by the dummy-emitter, after the removal of the dummy-emitter the emitter contact layers are selectively grown in its region. The contacting is then provided.

Manufacturing method for a self-aligned emitter-base-complex for

A method for manufacturing a heterobipolar transistor having and at least greatly diminished extrinsic base-collector capacitance provides an insulation implantation in a sub-collector layer grown onto a semi-insulating substrate via a first mask that covers a region provided for the sub-collector to be constructed or the sub-collector is formed by doping the semi-insulating substrate through a mask. The semiconductor layers for the collector, the base and the emitter, the sub-collector being fashioned in a limited region provided therefore and the emitter is aligned on the sub-collector with a second mask.

Method for manufacturing bipolar transistors having extremely reduced

A method for the manufacture of a planar, self-aligned emitter-base complex, whereby a semiconductor layer structure standard for hetero-bipolar transistors is first grown on a substrate, the base regions are subsequently etching through a mask technique and are provided with the base metallization and with a first dielectric layer and insulation implantations and spacers for electrical insulation of the base are manufactured, and, following thereupon, the emitter region is provided with the emitter metallization and with a third dielectric layer.

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Stuttgart, Germany

Hans-Peter Zwicknagl