Union Semiconductor Technology Corporation

Hans Peter Mikelson

John Jeffery Wagner

Michael Paul Fleischer

Jason Christopherson

George James Lobos

Gloria Marie Lee

Randall Scott Parker

Methods of making a sharp pointed structure (), such as a sharp pointed structure in a semiconductor, includes providing a substrate () and then depositing an oxide layer (), such as silicon oxide or silicon nitride, on the substrate () and depositing a low contrast photoresist () on the oxide layer (). The low contrast photoresist () is then exposed to optical energy through a reticle (), with the reticle () having a partially triangular shape (), such as an equilateral triangle with a tip. The low contrast photoresist () is developed and the oxide layer () is etched to form the sharp pointed structure (). Additionally, a film is deposited (), such as a magnetoresistive layer, between the substrate () and the oxide layer (). The low contrast photoresist () is removed and the film () is etched to create a sharp pointed film structure () in the film ().

Process to form fine features using photolithography and plasma etching

A method processes a thick TiW metal layer () on a dielectric layer (), where the dielectric layer () has been deposited on a substrate (), such as a silicon substrate. The method deposits the TiW metal layer () onto the dielectric layer (), such as silicon dioxide or silicon nitride, and then deposits a photoresist () over the TiW metal layer (). The method removes substantially all of the TiW metal layer () not in contact with the photoresist () with a uniform etch, such as not more than 80% to 90% of the deposited TiW metal layer. Then, the TiW metal layer () is selectively etched to the dielectric layer (), to remove the TiW metal layer () faster than the dielectric layer (), such as 2.7 times faster.

Process to pattern thick TiW metal layers using uniform and selective etching

A process forms electrical interconnects between memory bits in a magnetoresistive memory device. An initial dielectric layer is formed to overlie a semiconductor substrate. A magnetoresistive storage layer is formed over the initial dielectric layer. An electrically conductive stop layer that is selective to etch processes and is mechanically hard is deposited over the magnetoresistive storage layer. A hardmask layer is formed to overlie the stop layer. The hardmask layer is etched to expose the stop layer. The stop layer and the magnetoresistive storage layer are etched using ion milling until the initial dielectric layer is exposed, defining individual magnetoresistive memory bits. An isolation layer is formed over the hardmask layer and in the etch regions between magnetoresistive bits. The isolation layer is planarized using chemical mechanical polish (CMP) until the stop layer is exposed. An interconnect layer is then formed over the exposed regions of the stop layer and is etched to form electrical interconnects between memory bits.

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Eau Claire, WI, United States of America

Hans Peter Mikelson