Hughes Aircraft Company

Spectrolab, Inc.

Hans G Dill

David R Lillington

Alex M Leupp

Joseph A Minahan

Bruce T Cavicchi

George F Garlick

Eugene L Ralph

Nick Mardesich

Lewis T Lipton

Dieter K Zemmrich

Thomas N Toombs

A solar cell is disclosed wherein both the emitter and the base electrical contacts for a solar cell are disposed on the back major surface. Holes extend through the back major surface and the base layer to the emitter layer. The walls of the holes are doped to the same conductivity as the front emitter layer. Emitter contacts are deposited on the back major surface of the cell and extend into the holes making electrical contact to the emitter layer for collecting light generated current carriers. The base contacts are also disposed on the back major surface, and antireflection coatings are deposited on the emitter front major layer. Consequently, the front of the solar cell can be made smooth and therefore, a specularly reflective (non-scattering) solar cell results.

Controlled reflectance solar cell

A gallium arsenide solar cell is disclosed which employs a front aluminum gallium arsenide window layer. Metallic grid lines for charge carrier collection traverse the window layer and extend through this layer to the emitter layer. A flat conductive bar on the window layer crosses and makes electrical contact with the metallic grid lines. A flat metallic strip located on the window layer near an edge is spaced from the grid lines and conductive bar but is electrically coupled to the conductive bar by metallic bridges. Since the metallic strip is not in contact with the grid lines, external electrical connections can be affixed to the flat metallic strip using high temperature welding or soldering techniques without damage to the semiconductor body.

Solar cell with improved electrical contacts

A gallium arsenide solar cell is disclosed having an aluminum gallium arsenide window layer in which fine metallic contact lines extend through the aluminum gallium arsenide window to electrically contact the emitter layer, and a plurality of metallic grid lines disposed on the window layer cross the contact lines, thereby making electrical contact to the metallic contact lines. A flat metallic strip extending along one of the edges of the solar cell electrically couples the grid lines to one another. Consequently, two separate metals can be used, one with good ohmic contact properties for the grid lines and another with good adhesion and current conducting properties for the current collecting bars. Additionally, the metallic contacts lines can be made very narrow to reduce the contact area to the emitter thereby reducing the recombination current in the emitter.

Solar cell having improved front surface metallization

We disclose and claim a process for fabricating wraparound solar cells wherein vertical slots are scribed in a semiconductor wafer to initially define the lateral dimensions of the cell. Thereafter, photolithographic masking, etching and diffusion steps are used to define the geometry of a p-n junction of the cell. Then, using lift-off photolithography and a multiple-element metal deposition process, the solar cell grid lines are formed on one surface of the cell and p- and n-type metal contacts are extended around to the opposite surface of the cell. In this manner, the dimensions of the cell can be made less than the diameter of the semiconductor wafer from which it is made.

Process for fabricating a wraparound contact solar cell

A circuit comprised of interconnected complementary MIS devices is formed in a common semiconducting substrate by forming a plurality of complementary substrate regions in the common substrate, one region for each device whose source and drain regions are to have the same conductivity type as the common substrate. The other devices whose source and drain regions are to have the opposite conductivity type from that of the common substrate are formed directly therein. Interconnections between the devices are provided by a two-layer grid, the bottom layer of which is comprised of polycrystalline silicon conductors which also serve as the gates for the MIS devices. The top layer of the grid is comprised of a second set of conductors which is insulated from the bottom layer but which makes connection thereto and to the source and drain regions as well as to the complementary substrate at selected points. The regions of the substrate between adjacent MIS devices are covered by an oxide layer which extends both below and above the substrate surface and both ion implantation and the use of a doped oxide is disclosed for forming the complementary substrate regions.

Method of manufacturing a complementary metal-insulation-semiconductor

Substantial advantages over existing integrated transistorized matrices for driving flat panel liquid crystal displays may be achieved by the use of silicon on sapphire (SOS) and related technologies. Among the advantages are good isolation to prevent cross talk between circuit elements, simplified processing, reduced pinhole sensitivity, the possibility of utilizing the display in a back-lighted, transmissive mode of operation, and a greatly reduced sensitivity to ambient light. In the preferred embodiment disclosed, an integrated storage capacitor is associated with each transistor in the array. One plate of this capacitor, as well as the transistor and a plurality of vertical drain buses for the carrying of video signals may all be formed in a single processing step. In another single processing step it is possible to form the second plates of the capacitors, the gate electrodes and a plurality of horizontal gate buses upon which control signals may be impressed for line at a time addressing. Also in the preferred embodiment each bottom capacitor plate of a given vertical array is electrically shorted one to another thereby reducing the number of external ground connections required.

Method of making integrated transistor matrix for flat panel liquid

In forming the back panel of a liquid crystal display, layers of an insulating material and aluminum are successively deposited on the surface of a semiconducting substrate having an array of electrodes thereon. Openings are then formed through the insulating material and the aluminum layer to expose the electrodes, thereby defining a spacer lattice which is integral with the substrate and whose walls are of a uniform height which corresponds to the desired spacing between the front and back panels of the liquid crystal display.

Growing community of inventors

Newhall, CA, United States of America

Hans G Dill