Sun Microsystems, Inc.

Oracle America, Inc.

Oracle International Corporation

Nvidia Corporation

Hans Eberle

Nils Gura

Wladyslaw Olesinski

Hagen W Peters

Larry Robert Dennison

Sumti Jairath

Neil C Wilhelm

Vipul Gupta

Robert Dickson

Aron J Silverton

Peter J Yakutis

Sheueling Chang-Shantz

Lawrence Spracklen

Leonard D Rarick

Russell Allen Brown

Sheueling Chang Shantz

Edouard Goupy

Robert J Drost

Robert David Hopkins

Bernard Tourancheau

Nicolas Fugier

Georgios A Passas

Andreas Mejia

Stephen C Fung

Douglas Stebila

Daniel Finchelstein

Marc Herbert

John Martin Snyder

Packet flows between a transmitter and a receiver in an unreliable and unordered switched packet network may be established as a result of receiving a second packet comprising a second memory operation on a memory address. The transmission of memory load command packets followed by memory store command packets in the packet flow may be serialized, and a synchronization operation may be executed between the transmitter and the receiver when a packet count at the receiver satisfies a number of data packets in the packet flow.

Transceiver system with end-to-end reliability and ordering protocols

A communication method between a source device and a target device utilizes speculative connection setup between the source device and the target device, target-device-side packet ordering, and fine-grained ordering to remove packet dependencies.

Scalable light-weight protocols for wire-speed packet ordering

A network processor is described. This network processor determines a context for a message based on information in one or more fields in a payload of the message. For example, the context may be based on a message type and an identifier of the network connection on which the message was received. Then, the network processor calculates one or more trigger values based on one or more trigger expressions that perform checks on the information in the one or more fields. Moreover, the network processor determines one or more actions to be taken for the message based on the context and the one or more trigger values. In particular, the network processor determines whether the message is forwarded and one or more forwarding destinations.

Triggered-actions network processor

A compression first in, first out (cFIFO) that includes at least two FIFOs is described. A first FIFO is used to store instances of higher words in data entries, and a second FIFO is used to store corresponding instances of lower words in the data entries. If an instance of the higher word for a data entry has a different value than an immediately preceding stored instance of the higher word associated with at least an immediately preceding data entry which is stored in the second FIFO, memory pointers are incremented so that a subsequent instance of the higher word will be stored in the second FIFO without overwriting the instance of the higher word. Otherwise, the memory pointers are unchanged, which associates the instance of the lower word with the immediately preceding stored instance of the higher word.

Zero-delay compression FIFO buffer

The disclosed embodiments relate techniques for using annotations to extract parameters from messages. During operation, a computing device receives a message from a network interface. After determining a message type for the message, a format decoder in the computing device uses the message type to determine an annotation that is associated with the message type. The message and the annotation are then output to one or more functional units of the computing device, with the annotation output aligned with the message on a per-message-byte basis.

Using annotations to extract parameters from messages

A hardware-implemented rate limiter is described. This implementation guarantees that messages containing a value v are not forwarded at a higher rate than a predefined threshold value r. More specifically, given a number of times x in a time interval y, which specifies a rate r defined by x/y, the rate limiter reports a violation by selectively setting an error value when v occurs more than x times during the time interval y. Moreover, the rate limiter may be able to keep track of multiple predefined threshold values for different rates. Furthermore, the rate limiter may keep track of 2different values v, where b is the number of digits of the binary representation of v.

Rate limiter for a message gateway

The disclosed embodiments describe single-instruction processors that operates upon messages received from a network interface. A single-instruction processor comprises a register file, a functional unit, a bus connecting the register file and the functional unit, and a format decoder that receives messages from a network interface. This single-instruction processor supports a single instruction type (e.g., a 'move instruction') that specifies operands to be transferred via the bus. During operation, the format decoder is configured to write a parameter from a received message to the register file. A move instruction moves this parameter from the register file to the functional unit via the bus. The functional unit then uses the parameter to perform an operation.

Using a single-instruction processor to process messages

Embodiments of a system that includes a switch and a buffer-management technique for storing signals in the system are described. In this system, data cells are dynamically assigned from a host buffer to at least a subset of switch-ingress buffers in the switch based at least in part on the occupancy of the switch-ingress buffers. This buffer-management technique may reduce the number of switch-ingress buffers relative to the number of input and output ports to the switch, which in turn may overcome the limitations posed by the amount of memory available on chips, thereby facilitating large switches.

Dynamic assignment of data to switch-ingress buffers

A method for managing packets, including: identifying a first plurality of packets from a first packet source having a first weight; identifying a second plurality of packets from a second packet source having a second weight; obtaining a first weight ratio based on the first weight and the second weight; obtaining an error threshold and a first error value corresponding to the second packet source, where the error threshold exceeds the first error value; forwarding a first packet from the first packet source in response to the error threshold exceeding the first error value; incrementing the first error value by the first weight ratio; forwarding a first packet from the second packet source, after incrementing the first error value and in response to the first error value exceeding the error threshold; and decrementing the first error value.

Weighted differential scheduler

A method includes a local switch receiving a first set of upstream packets and a first set of local packets, each assigned a first class of service. The local switch inserts, according to a first insertion rate, a local packet between subsets of the first set of upstream packets to obtain an ordered set of first class packets. The local switch also receives a second set of upstream packets and a second set of local packets, each assigned a second class. The local switch inserts, according to a second insertion rate, a local packet between subsets of the second set of upstream packets to obtain an ordered set of second class packets. The method includes for each timeslot, selecting a class, and forwarding a packet from the selected class of service to a downstream switch. The switches are interconnected in a daisy chain topology on a single chip.

Classes of service for network on chips

A method for transmitting packets, including forwarding a first set of upstream packets and a first set of local packets by inserting at least one of the first set of local packets between subsets of the first set of upstream packets according to a first insertion rate; calculating a second insertion rate after forwarding a predetermined number of upstream packets generated by a single upstream source, by dividing a cardinality of the first set of upstream packets by a greatest common divisor of the predetermined number and the cardinality of the first set of upstream packets; and forwarding a second set of upstream packets and a second set of local packets from the local switch to the downstream switch by inserting at least one of the second set of local packets between subsets of the second set of upstream packets according to the second insertion rate.

Simple fairness protocols for daisy chain interconnects

A method for managing packets, including identifying a first packet source having a first weight and second packet source having a second weight, where the first weight exceeds the second weight; assembling a first regular subsequence of packets using a first packet from the second packet source and a first set of packets from the first packet source having a cardinality equal to a first weight ratio; assembling a first augmented subsequence of packets using a second packet from the second packet source and a second set of packets from the first packet source having a cardinality equal to the first weight ratio plus one; and forwarding a first sequence of packets including a first set of regular subsequences, which includes the first regular subsequence, and a first set of augmented subsequences, which includes the first augmented subsequence and has a cardinality based on the first augmented subsequence factor.

Growing community of inventors

Mountain View, CA, United States of America

Hans Eberle