Hewlett-packard Development Company, L.p.

Other

Hang Ru Goy

Boon Bing Ng

Patrick Leonard

Mohan Kumar Sudhakar

Rui Pan

Shane O'Brien

In some examples, a control apparatus for a fluid ejection device includes a plurality of selectors controllable by an input control signal to produce signals for selecting respective nozzles of the fluid ejection device, where a first selector is responsive to the input control signal propagated over a first signal path to turn on a device in the first selector, and a second selector is responsive to the input control signal to perform a different task. A memory encoder is to select a memory location in the memory, the memory encoder responsive to the input control signal propagated over a second signal path to turn on a device in the memory encoder, where signal loading of the second signal path is isolated from signal loading of the first signal path.

Input control signals propagated over signal paths

In some examples, a circuit for use with a fluid ejection device includes a plurality of decoders responsive to a common address to activate respective control signals at different times for selecting respective memories of the fluid ejection device. Each respective decoder of the plurality of decoders comprising a discharge switch to deactivate a control signal of the respective decoder while another decoder of the plurality of decoders is activating a control signal in response to the common address.

Decoders for memories of fluid ejection devices

Three-dimensional addressing for erasable programmable read only memory (EPROM) can include a number of EPROM banks, a number of shift registers, a row select data signal, a column select data signal, and a bank select data signal.

Three-dimensional addressing for erasable programmable read only memory

A fluid ejection device including a printhead die having a plurality of layers, including a single metal layer, and having an integrated ink level sensor. The ink level sensor includes an ink chamber above the metal layer, a metal plate of a sense capacitor disposed in the metal layer, and a clearing resistor circuit disposed in the metal layer including four clearing resistors arranged in a surround-4 configuration about the metal plate and electrically connected in parallel between a voltage potential and ground, wherein adjacent ends of at least two clearing resistors are not directly connected to one another so as to leave a gap between the adjacent ends in the metal layer. A metal lead in the metal layer extends through the gap to the metal plate.

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Singapore, Singapore

Hang Ru Goy