China Electronic Technology Corporation, 24th Research Institute

No. 24 Research Institute of China Electronics Technology Group Corporation

Hanfu Shi

Guangbing Chen

Ruzhang Li

Yuxin Wang

Gangyi Hu

Daiguo Xu

Tao Liu

Lu Liu

Xu Wang

Minming Deng

Jian'an Wang

Dongbing Fu

Jianan Wang

Provided in the present invention is a transconductance amplifier based on a self-biased cascode structure. The transconductance amplifier includes a self-biased cascode input-stage structure constituted by PMOS (P-channel Metal Oxide Semiconductor) input transistors M, M, Mand M, a self-biased cascode first-stage load structure constituted by NMOS (N-channel Metal Oxide Semiconductor) transistors M, M, Mand M, a second-stage common-source amplifier structure constituted by an NMOS transistor Mand a PMOS transistor M, a bias circuit structure constituted by NMOS transistors Mand Mand a PMOS transistor M, an amplifier compensation capacitor C, an amplifier load capacitor C, a reference current source Iref and a PMOS transistor Mthat provides a constant current source function. Further provided in the present invention is a transconductance amplifier based on a self-biased cascode structure, which adopts an NMOS transistor as an input transistor. Both input transistors and load transistors of a first-stage amplifier of the present invention adopt self-biased cascode structures, such that the output impedance and the DC gain of the first-stage amplifier are increased. Substrate voltages of the MOS transistors of the first-stage amplifier are provided by an amplifier bias circuit. Owing to a connection mode of the compensation capacitor C, a higher figure of merit is achieved.

Transconductance amplifier based on self-biased cascode structure

A high-speed low-power-consumption trigger, which comprises a control signal generation circuit, an enabling unit, and a latch structure. The latch structure comprises two input ends, two output ends, two enabling ends, a second enabling end, and a ground end. The enabling unit comprises two enabling circuits. An output signal X of the control signal generation circuit and an external control signal D serve as input signals of the first enabling circuit. An output end of the first enabling circuit is connected to the first enabling end. The output signal X of the control signal generation circuit and a phase-inverted signal DB of the external control signal D serve as input signals of the second enabling circuit. An output end of the second enabling circuit is connected to the second enabling end.

High-speed low-power-consumption trigger

The present invention provides a frequency-compensated transconductance amplifier, includes an input stage consisting of NMOS transistors Mand M, a first-stage active load consisting of PMOS transistors Mand M, a first-stage tail current source consisting of a constant current source Iss, a second-stage input transistor consisting of a PMOS transistor M, a second-stage constant current source consisting of an NMOS transistor M, a load capacitor consisting of a capacitor C, and a frequency compensation network formed by sequentially connecting a gain stage GAIN, a compensating resistor Rc and a compensating capacitor Cc in series.

Frequency-compensated transconductance amplifier

Growing community of inventors

Chongqing, China

Hanfu Shi