Samsung Electronics Co., Ltd.

Hanan Lechtman

Jun Jin Kong

Michael Erlihson

Amir Bennatan

Amitai Perlstein

A memory device controller includes a main processor and a sequencer. The sequencer is configured to: estimate a time interval required to complete execution of a set of atom commands allocated to a channel of a non-volatile memory; calculate, for each of the plurality of atom commands, an urgency value associated with completing execution of a corresponding memory command after expiration of the time interval required to complete execution of the set of atom commands allocated to the channel; schedule each of the plurality of atom commands in the set of atom commands for execution by the non-volatile memory based on the calculated urgency values; and output the plurality of atom commands to the non-volatile memory for execution in the scheduled order.

Growing community of inventors

Ramat Gan, Israel

Hanan Lechtman