Samsung Electronics Co., Ltd.

Samsung Eleotronicc Co., Ltd

Han-su Cho

Suk-jin Kim

Hyun-jung Kim

Young-hwan Park

Kyoung-hoon Kim

Dae-Hyun Kim

Dong-kwan Suh

Keshava Prasad Nagaraja

Kang-jin Yoon

Seung-won Lee

Kyung-hoon Kim

Ki-seok Kwon

Dong-wook Kwon

Dong-soo Lee

Chae-seok Im

Young-Hwan Park

Keshava Prasad

Sang-Bok Han

An electronic apparatus for performing machine learning a method of machine learning, and a non-transitory computer-readable recording medium are provided. The electronic apparatus includes an operation module configured to include a plurality of processing elements arranged in a predetermined pattern and share data between the plurality of processing elements which are adjacent to each other to perform an operation; and a processor configured to control the operation module to perform a convolution operation by applying a filter to input data, wherein the processor controls the operation module to perform the convolution operation by inputting each of a plurality of elements configuring a two-dimensional filter to the plurality of processing elements in a predetermined order and sequentially applying the plurality of elements to the input data.

Electronic apparatus for operating machine learning and method for operating machine learning

Provided are a method and apparatus for processing a convolution operation in a neural network. The apparatus may include a memory, and a processor configured to read, from the memory, one of divided blocks of input data stored in a memory; generate an output block by performing the convolution operation on the one of the divided blocks with a kernel; generate a feature map by using the output block, and write the feature map to the memory.

Device and method for processing convolution operation using kernel

An electronic apparatus is provided. The electronic apparatus includes a first memory configured to store a first artificial intelligence (AI) model including a plurality of first elements and a processor configured to include a second memory. The second memory is configured to store a second AI model including a plurality of second elements. The processor is configured to acquire output data from input data based on the second AI model. The first AI model is trained through an AI algorithm. Each of the plurality of second elements includes at least one higher bit of a plurality of bits included in a respective one of the plurality of first elements.

Electronic apparatus and control method thereof

Disclosed is an electronic device. The An electronic device including a storage, and a processor configured to perform convolution processing on target data and kernel data based on stride information that indicates an interval at which the kernel data is applied to the target data stored in the storage, in which the processor is further configured to divide the target data into a plurality of pieces of sub-data based on first stride information, perform the convolution processing on the plurality of pieces of sub-data and a plurality of pieces of sub-kernel data respectively corresponding to the plurality of pieces of sub-data based on second stride information that is different from the first stride information, and combine a plurality of processing results, the plurality of pieces of sub-kernel data are obtained by dividing the kernel data based on the first stride information, and the second stride information indicates that the interval at which the kernel data is applied to the target data is 1.

Electronic device and control method thereof

Disclosed is an electronic device and method for controlling same. The electronic device comprises: a memory; and a processor which checks an operation instruction for filtering input data of a neural network for each filter of a main pattern selected from a plurality of filters generated according to learning by the neural network, and stores the checked operation instruction in the memory.

Electronic device and method for controlling same

A processor for performing deep learning is provided herein. The processor includes a processing element unit including a plurality of processing elements arranged in a matrix form including a first row of processing elements and a second row of processing elements. The processing elements are fed with filter data by a first data input unit which is connected to the first row processing elements. A second data input unit feeds target data to the processing elements. A shifter composed of registers feeds instructions to the processing elements. A controller in the processor controls the processing elements, the first data input unit and second data input unit to process the filter data and target data, thus providing sum of products (convolution) functionality.

Processor and control methods thereof for performing deep learning

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Suwon-si, South Korea

Han-su Cho