Industry-University Cooperation Foundation Hanyang University

Han Sol Jun

Jin Young Choi

Jea Gun Park

Jong Ung Baek

Hyun Gyu Lee

Sun Hwa Jung

Mi Ri Park

Dong Gi Lee

Kei Ashiba

Kondo Kei

Disclosed is a memory device including a multi-bit perpendicular magnetic tunnel junction, wherein the multi-bit perpendicular magnetic tunnel junction includes an upper synthetic antiferromagnetic layer, pinned layer, lower dual free layer, and upper free layer formed in a laminated manner between a top electrode and a bottom electrode.

Memory device based on multi-bit perpendicular magnetic tunnel junction

Disclosed is a memory device. A memory device according to an embodiment of the present invention includes a memory device including a substrate; and a lower electrode, seed layer, lower synthetic antiferromagnetic layer, magnetic tunnel junction, upper synthetic antiferromagnetic layer, and upper electrode that are laminated on the substrate, wherein the magnetic tunnel junction includes a lower pinned layer, lower tunnel barrier layer, lower free layer, separation layer, upper free layer, upper tunnel barrier layer and upper pinned layer that are sequentially laminated.

Multi-bit magnetic memory device

Growing community of inventors

Seoul, South Korea

Han Sol Jun