Samsung Electronics Co., Ltd.

Samsung Sdi Co., Inc.

Han-Ju Lee

Youngjin Cho

Youngkwang Yoo

Jun-Sik Oh

Yoon-Sung Um

Se-Hwan Yu

Bum-Ki Baek

Sang-Ki Kwak

Min-Wook Park

Jeong-Young Lee

Sang-Jin Jeon

Kweon-Sam Hong

Jung-Joon Park

Kwon-Young Choi

Sungyong Seo

Su-Bin Song

Sang-Hyun Ju

Young-Goo Song

Jun-Yeob Lee

JinHyeok Choi

Younggeun Lee

Kook-Hyun Choi

Jae-Hong Jeon

Yeong-Beom Lee

In-Sung Lee

Hyo-Deok Shin

Jang-Bog Ju

Kyung-Seop Kim

Jung-Yeon Yoon

Yong-Eui Lee

Ha-Neul Jeong

Kwangseok Im

Duck-Jung Lee

Jae-Hun Chung

Seon Bong Kim

Seung Moon Woo

A storage device includes a storage controller and a host interface which sends an address translation service request to a host. The host interface includes an address translation cache which stores first address information included in the address translation service request, and an address translation service latency storage which stores latency-related information including a first time until the address translation cache receives an address translation service response corresponding to the address translation service request from the host. After the host interface sends the address translation service request to the host based on the latency-related information including the first time, and after the first time elapses, the storage controller polls the host interface.

Storage system and storage device, and operating method thereof

A storage device includes random access memories, nonvolatile memory devices, a controller configured to control the nonvolatile memory devices, and a driver circuit configured to receive a command and an address from an external device, output a buffer command according to the command and the address, and transmit the command and the address to one of a first channel connected to the random access devices and a second channel connected to the controller according to the command and the address. The storage device further includes a plurality of data buffers configured to communicate with the external device and electrically connect the external device to one of a third channel connected to the random access memory devices and a fourth channel connected to the controller in response to the buffer command. Each of the data buffers includes a FIFO (first-in first-out) circuit.

Storage device including random access memory devices and nonvolatile memory devices

A storage device includes a data buffer, a device controller, and nonvolatile memories. The data buffer is configured to transact data from an external device. The device controller is configured to receive a command and an address from an external device, to control the data buffers, and to transact data with the data buffers. The nonvolatile memories are configured to perform write, read, and erase operations under control of the device controller. When a first link training between an external device and the data buffers is performed by the external device, the device controller performs a second link training between the device controller and a data buffer internally without control of the external device.

Storage device and operating method of storage device

The nonvolatile memory module includes at least one nonvolatile memory device and a device controller configured to receive a storage command from an external device and to perform an operation corresponding to the received storage command. The device controller includes a random access memory (RAM). After completing the corresponding operation, the device controller stores status information in the RAM and then transmits an alert signal to the external device.

Nonvolatile memory module and operation method thereof

A nonvolatile memory module may include a nonvolatile memory device, a nonvolatile memory controller configured to control the nonvolatile memory device, a volatile memory device configured as a cache memory of the nonvolatile memory device, and a module controller configured to receive a command and an address from an external device, external to the nonvolatile memory module, and to send a volatile memory command and a volatile memory address to the volatile memory device through a first bus and a nonvolatile memory command and a nonvolatile memory address to the controller through a second bus in response to the received command and address. The volatile memory device is configured to load two or more cache data on each of two or more memory data line groups and two or more tags on each of two or more tag data line groups in response to the volatile memory address.

Nonvolatile memory modules comprising volatile memory devices and nonvolatile memory devices

Disclosed is a memory system. The memory system includes a volatile memory device configured to exchange data with a host through a first channel, a nonvolatile memory device, and a memory controller connected with the volatile memory device through a second channel. The memory controller detects a request of the host or a power state and controls the volatile memory device and the nonvolatile memory device based on the detection result such that data stored in the volatile memory device is backed up in the nonvolatile memory device through the second channel. The volatile memory device includes a first interface for communicating with the host through the first channel and a second interface for communicating with the memory controller through the second channel.

Nonvolatile memory module having backup function

A memory controller comprises at least one interface configured to receive a request, user data, and an address from an external source, a first data check engine configured to generate data check information based on the received address and the user data in response to the received request, and a second data check engine configured to check the integrity of the user data based on the generated data check information where the user data is transmitted to the nonvolatile memory. The memory controller is configured to transmit the user data received from the external source to an external destination where the integrity of the user data is verified according to a check result, and is further configured to transmit an interrupt signal to the external source and the external destination where the check result indicates that the user data comprises an error.

Memory system monitoring data integrity and related method of operation

An array substrate including a plurality of pixel regions transmitting light includes a switching element disposed in each of the pixel regions defined by gate and source lines, wherein the switching element is electrically connected to the gate and source lines, a pixel electrode electrically connected to the switching element, a first insulating layer disposed on the switching element, and a second insulating layer disposed under the first insulating layer, wherein a thickness of the second insulating layer is dependent on a peak wavelength of red light.

Array substrate, liquid crystal display panel and liquid crystal display device having the same

A method of manufacturing a thin film transistor array panel is provided, which includes: forming a gate line on a substrate; depositing a gate insulating layer and a semiconductor layer in sequence on the gate line; depositing a lower conductive film and an upper conductive film on the semiconductor layer; photo-etching the upper conductive film, the lower conductive film, and the semiconductor layer; depositing a passivation layer; photo-etching the passivation layer to expose first and second portions of the upper conductive film; removing the first and the second portions of the upper conductive film to expose first and second portions of the lower conductive film; forming a pixel electrode and a pair of redundant electrodes on the first and the second portions of the lower conductive film, respectively, the redundant electrodes exposing a part of the second portion of the lower conductive film; removing the exposed part of the second portion of the lower conductive film to expose a portion of the semiconductor layer; and forming a columnar spacer on the exposed portion of the semiconductor layer.

Method of manufacturing a thin film transistor array panel

An EL display is provided with enhanced light emission characteristics wherein light emitted from a light-emitting layer undergoes constructive interference due to a resonance effect. The EL display includes a transparent substrate, an anode and a cathode formed on the same side of the transparent substrate, and an intermediate layer interposed between the anode and the cathode, and said intermediate layer including a light-emitting layer that emits light when the anode and the cathode are electrically driven by a voltage, and wherein the anode and the cathode are formed as a translucent conductive layer that partially reflects the light emitted from the light-emitting layer.

Microcavity electroluminescent display with partially reflective electrodes

Red, green, blue color filters are arranged in sequence in pixel areas of an LCD according to the present invention. Filters, which are scattering particles of a scattering layer, are distributed in a net, and they are distributed in a diagonal direction such that the concentration of the fillers is lower in border areas located between the pixel areas than in the pixel areas.

Polarizer, panel for a liquid crystal display, and liquid crystal display, including a scattering layer

Disclosed is a liquid crystal display device capable of improving a viewing angle thereof while reducing a gray scale inversion. The liquid crystal display device has a porous film aligned on a liquid crystal display panel and having a plurality of pores. The porous film has sidewalls defined by the pores and reflecting a part of light exited from the liquid crystal display panel. That is, the sidewalls reflect a first group of light, which has relatively higher luminance by passing through a short axis of liquid crystal, towards a second group of light having a relatively lower luminance by passing through a long axis of liquid crystal. Accordingly, the viewing angle of the liquid crystal display device is expanded and the gray scale inversion is reduced.

Liquid crystal display device having a light path changing means having a porous film with a plurality of pores

Growing community of inventors

Hwaseong-si, South Korea

Han-Ju Lee