Samsung Electronics Co., Ltd.

Seoul National University

Han Jin Lim

Ki Hyun Hwang

Sungjin Kim

Jung Ho Kim

Dongjin Lee

Satoru Yamada

Ji Hoon Choi

Phil Ouk Nam

Seulye Kim

Ji Eun Lee

Moonyoung Jeong

Jae Young Ahn

Sung Heo

Hong Suk Kim

Jiho Yoo

Eunae Cho

Gyeongsu Park

Sung Gil Kim

Kyoung-Ho Jung

Yongsu Kim

Kyoo Ho Jung

Dong Su Ko

Cheol Seong Hwang

Ki Nam Kim

Sang Yeol Kang

Hyung Suk Jung

Kyu Ho Cho

Hyun Uk Park

Seok Sik Kim

Young Sub Yu

Sung Je Choi

Hyun Soo Park

Hyun Wook Park

Jung Min Park

Cheol Jin Cho

A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate including a trench. The semiconductor device further includes a gate electrode disposed in the trench, and a gate insulating film disposed between the substrate and the gate electrode. The gate electrode includes a gate conductor and a metal element, and an effective work function of the gate electrode is less than an effective work function of the gate conductor.

Semiconductor device and method of manufacturing the same

A semiconductor device including a switching element on a substrate, a pad isolation layer on the switching element, a conductive pad passing through the pad isolation layer and connected to the switching element, an insulating pattern on the pad isolation layer and having a height greater than a horizontal width, a lower electrode on side surfaces of the insulating pattern on side surfaces of the insulating pattern and in contact with the conductive pad, a capacitor dielectric layer on the lower electrode and having a monocrystalline dielectric layer and a polycrystalline dielectric layer, the monocrystalline dielectric layer being relatively close to side surfaces of the insulating pattern compared to the polycrystalline dielectric layer an upper electrode on the capacitor dielectric layer may be provided.

Semiconductor device including capacitor and method of forming the same

Semiconductor devices are provided. The semiconductor devices includes a landing pad on a substrate, a lower electrode on the landing pad and connected to the landing pad, a capacitor dielectric film that is on the lower electrode and includes both a tetragonal crystal system and an orthorhombic crystal system, a first doping layer that is between the lower electrode and the capacitor dielectric film and includes a first metal, and an upper electrode on the capacitor dielectric film.

Semiconductor devices and methods for fabricating the same

There is provided a semiconductor device capable of improving the performance and/or reliability of the element, by increasing the capacitance of the capacitor, using a capacitor dielectric film including a ferroelectric material and a paraelectric material. The semiconductor device includes first and second electrodes disposed to be spaced apart from each other, and a capacitor dielectric film disposed between the first electrode and the second electrode and including a first dielectric film and a second dielectric film. The first dielectric film includes one of a first monometal oxide film and a first bimetal oxide film, the first dielectric film has an orthorhombic crystal system, the second dielectric film includes a paraelectric material, and a dielectric constant of the capacitor dielectric film is greater than a dielectric constant of the second dielectric film.

Semiconductor device

A semiconductor device includes a stack structure on a substrate, the stack structure including interlayer insulating layers and first gate electrodes alternately stacked on each other, a semiconductor layer in an opening penetrating through the stack structure, a first dielectric layer between the semiconductor layer and the stack structure, and a lower pattern closer to the substrate than to the first gate electrodes in the stack structure, the lower pattern including a first surface facing the first dielectric layer, and a second surface facing the stack structure, the second surface defining an acute angle with the first surface, wherein the first dielectric layer includes a first portion facing the stack structure, and a second portion facing the first surface of the lower pattern, the second portion having a thickness greater than a thickness of the first portion.

Vertical memory device with a channel layer in a stacked dielectric layer

Semiconductor device including dielectric layer

Growing community of inventors

Seoul, South Korea

Han Jin Lim