Sifive, Inc.

Han Chen

John Drummond

Systems and methods are disclosed for to generation of dynamic design flows for integrated circuits. For example, a method may include accessing a design flow configuration data structure, wherein the design flow configuration data structure is encoded in a tool control language; based on the design flow configuration data structure, selecting multiple flowmodules from a set of flowmodules, wherein each flowmodule provides an application programming interface, in the tool control language, to a respective electronic design automation tool; based on the design flow configuration data structure, generating a design flow as a directed acyclic graph including the selected flowmodules as vertices; and generating an output integrated circuit design data structure, based on one or more input integrated circuit design data structures, using the design flow to control the respective electronic design automation tools of the selected flowmodules.

Generation of dynamic design flows for integrated circuits

Systems and methods are disclosed for pad ring generation for integrated circuits. For example, a method may include accessing a pad ring configuration data structure, wherein the pad ring configuration data structure declares rules for inputs and outputs of an integrated circuit using a scripting language; based on the pad ring configuration data structure, automatically generating an integrated circuit design data structure that encodes a physical design for the integrated circuit that includes a pad ring with bumps satisfying the rules for inputs and outputs of the integrated circuit and also includes a placeholder for additional logic circuits, wherein the placeholder includes connections to one or more input drivers of the pad ring and to one or more output drivers of the pad ring; and transmitting, storing, or displaying the integrated circuit design data structure.

Pad ring generation for integrated circuits

Systems and methods are disclosed for validating and integrating intellectual property (IP) blocks in integrated circuit design flows for integrated circuits. A method includes unpacking a third-party IP block package to obtain the IP block files, executing an IP block validation rule structure on the IP block files, wherein the IP block validation rule structure is encoded in a tool control language and wherein the IP block validation rule structure includes a plurality of validation tests, each validation test checking a different validity aspect of the IP block files in the IP block package, generating at least one report based on execution of the validation tests to the IP block files, storing successfully validated IP block files in a library, generating a file manifest for the successfully validated IP block files, and providing the file manifest to design tools for designing and manufacturing of an integrated circuit.

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Cupertino, CA, United States of America

Han Chen