Alpha Omega Semiconductor Inc.

Fairchild Semiconductor Corporation

Siliconix Incorporated

Ipower Semiconductor

Other

Maxpower Semiconductor Inc.

Taiwan Semiconductor Manufacturing Comp. Ltd.

Alpha and Omega Semiconductor (Cayman) Ltd.

Computime Ltd.

Gem Services, Inc.

Volterra Semiconductor Corporation

Vishay-Siliconix

Fairchild Semiconductor Corporatiion

Alpha and Omage Semiconductor Inc.

Aplha and Omega Semiconductor Incorporated

Hamza Yilmaz

Madhur Bobde

Anup Bhalla

Jun Lu

Yan Xun Xue

Lingpeng Guan

John Chen

Hong Chang

Daniel S Calafut

Yueh-Se Ho

Daniel Ng

Jongoh Kim

Xiaobin Wang

Yeeheng Lee

Steven Paul Sapp

Ming-Chen Lu

Karthik Padmanabhan

Jun W Chen

Richard Kent Williams

Sik Lui

Jun Hu

Michael E Cornell

Wenjun Li

Nathan Lawrence Kraft

Wilson Ma

Fwu-Iuan Hshieh

Joseph Andrew Yedinak

Ping Huang

Zhiqiang Niu

Christopher Boguslaw Kocon

Dean E Probst

Ashok Challa

Xiaotian Zhang

Bruce Douglas Marchant

Moses Ho

Lei Zhang

Mike F Chang

Ji Pan

Thomas E Grebs

Gary M Dolny

Rodney S Ridley

Yuping Gong

Yongping Ding

Yan Huo

Lei Shi

Qi Wang

Minhua Li

Il Kwan Lee

Xiaoguang Zeng

Jong Oh Kim

James J Murphy

Liang Zhao

Paul Thorup

Hongtao Gao

Mohamed N Darwish

Anthony Chia

Kai Chieh Liu

Yi Qiang Su

King Owyang

Peter L Wilson

Hongyong Xue

Christopher Lawrence Rexer

Yiming Gu

Wai-Leung Ha

Dick Kwai Chan

Aryadeep Mrinal

Yang Xiang

Richard A Blanchard

Marco A Zuniga

Budong You

Sung-Shan Tai

John Amato

Yang Lu

Dorman C Pitzer

Hua Pan

Hung Bun Choi

Ihsiu Ho

Suku Kim

John Tracey Andrews

Jan Van Der Linde

Fei Wang

Jun Zeng

Kyle Terrill

James N Pan

Chung-Lin Wu

Izak Bencuya

LiMing Wang

Praveen Muraleedharan Shenoy

Ping Wu

Becky Losee

Mark L Rinehimer

Robert Herrick

John Huang

Yau Wai Ng

Chongman Yun

Jaegil Lee

Yu Gong

Wai Yin Shum

Christopher L Rexer

Dwayne S Reichl

A shield trench power device such as a trench MOSFET or IGBT includes a substrate or an epitaxial layer of silicon, silicon carbide, gallium nitride, or gallium arsenide and employs an in-trench structure including a gate structure and an underlying polysilicon or oxide shield region that contacts a shield region in an epitaxial or crystalline layer of the device. The poly silicon region may be laterally confined by spacers in a gate trench and may contact or be isolated from the underlying shield region. Alternatively, the polysilicon region may be replaced with an insulating region.

Shielded trench devices

A field stop insulated gate bipolar transistor (IGBT) fabricated without back-side laser dopant activation or any process temperatures over 450° C. after fabrication of front-side IGBT structures provides activated injection regions with controlled dopant concentrations. Injection regions may be formed on or in a substrate by epitaxial growth or ion implants and diffusion before growth of N field stop and drift layers and front-side fabrication of IGBT active cells. Back-side material removal can expose the injection region(s) for electrical connection to back-side metal. Alternatively, after front-side fabrication of IGBT active cells, back-side material removal can expose the field stop layer (or injection regions) and sputtering using a silicon target with a well-controlled doping concentration can form hole or electron injection regions with well-controlled doping concentration.

Field stop IGBT with grown injection region

A high voltage edge termination structure for a power semiconductor device is provided. The high voltage edge termination structure comprises a semiconductor body of a first conductive type, a JTE region of a second conductive type, a heavily doped channel stop region of the first conductive type, and a plurality of field plates. The JTE region is formed in the semiconductor body, wherein the JTE region is adjacent to an active region of the power semiconductor device. The heavily doped channel stop region is formed in the semiconductor body, wherein the heavily doped channel stop region is spaced apart from the JTE region. The plurality of field plates is formed on the JTE region.

High voltage edge termination structure for power semiconductor devices

High voltage edge termination structure for power semiconductor devices and manufacturing method thereof

A field stop insulated gate bipolar transistor (IGBT) fabricated without back-side laser dopant activation or any process temperatures over 450&#xb0; C. after fabrication of front-side IGBT structures provides activated injection regions with controlled dopant concentrations. Injection regions may be formed on or in a substrate by epitaxial growth or ion implants and diffusion before growth of N field stop and drift layers and front-side fabrication of IGBT active cells. Back-side material removal can expose the injection region(s) for electrical connection to back-side metal. Alternatively, after front-side fabrication of IGBT active cells, back-side material removal can expose the field stop layer (or injection regions) and sputtering using a silicon target with a well-controlled doping concentration can form hole or electron injection regions with well-controlled doping concentration.

Back side dopant activation in field stop IGBT

A shielded gate trench MOSFET device structure is provided. The device structure includes MOS gate trenches and p body contact trenches formed in an n type epitaxial silicon layer overlying an n+ silicon substrate. Each MOS gate trench includes a gate trench stack having a lower n+ shield poly silicon layer separated from an upper n+ gate poly silicon layer by an inter poly dielectric layer. The upper and lower poly silicon layers are also laterally isolated at the areas where the lower poly silicon layer extends to silicon surface by selectively removing portion of the upper poly silicon and filling the gap with a dielectric material. The method is used to form both MOS gate trenches and p body contact trenches in self-aligned or non self-aligned shielded gate trench MOSFET device manufacturing.

Shielded gate trench MOSFET devices

A lateral super junction JFET is formed from stacked alternating P type and N type semiconductor layers over a P-epi layer supported on an N+ substrate. An N+ drain column extends down through the super junction structure and the P-epi to connect to the N+ substrate to make the device a bottom drain device. N+ source column and P+ gate column extend through the super junction but stop at the P-epi layer. A gate-drain avalanche clamp diode is formed from the bottom the P+ gate column through the P-epi to the N+ drain substrate.

Sawtooh electric field drift region structure for planar and trench power semiconductor devices

The present invention provides semiconductor devices with super junction drift regions that are capable of blocking voltage. A super junction drift region is an epitaxial semiconductor layer located between a top electrode and a bottom electrode of the semiconductor device. The super junction drift region includes a plurality of pillars having P type conductivity, formed in the super junction drift region, which are surrounded by an N type material of the super junction drift region.

Small pitch super junction MOSFET structure and method

A shield trench power device such as a trench MOSFET or IGBT employs a gate structure with an underlying polysilicon shield region overlying a shield region in an epitaxial or crystalline layer of the device. The polysilicon region may be laterally confined by spacers in a gate trench and may contact or be isolated from the underlying shield region. Alternatively, the polysilicon region may be replaced with an insulating region.

A self-aligned p+ contact MOSFET device is provided. A process to manufacture the device includes forming oxide plugs on top of gate trenches, conducting uniform silicon mesa etch back, and forming oxide spacers to form contact trenches.

Self-aligned trench MOSFET and IGBT structures and methods of fabrication

A thermostatic radiator valve (TRV) assembly or automatic temperature balanced actuator (ABA) assembly controls a manifold assembly through a push pin bearing mechanism. The push pin bearing mechanism comprises a push pin that moves in a linear direction responsive to rotational movement of a motor gear that is coupled through a helical gear. Rotational movement of the push pin is prevented by a ball bearing assembly. Movement of the push pin is transferred to a manifold pin, which in turn, controls the manifold assembly. Because the push pin moves in a linear rather than a rotational fashion, erosion of the mated manifold pin is substantially reduced with respect to transitional approaches.

Push pin bearing mechanism for actuators

Growing community of inventors

Saratoga, CA, United States of America

Hamza Yilmaz