Lattice Semiconductor Corporation

Hamid Ghezel

Vinh Ho

Magathi Jayaram

David Li

Qin Wei

In one embodiment, an integrated circuit has one or more multi-channel transmitters, each transmitter having synchronization circuitry that synchronizes different copies of a reset signal used to reset different sets of TX channel circuitry used to generate the multiple TX signals, to reduce the skew between the different TX signals. Each set of synchronization circuitry has (at least) two synchronization stages that re-time different copies of the reset signal to a selected clock signal. In one implementation, the integrated circuit has (at least) two quads, each of which can generate four different TX signals, where both quads can be configured to use the same clock signal to re-time different copies of the reset signal such that the eight different TX signals are all synchronized to one another.

Multi-channel transmitter synchronization circuitry

In one embodiment, a voltage-controlled oscillator has a ring of delay stages and power-regulating circuitry regulating power to each delay stage. Each delay stage has at least one inverter having a leg having a current regulator that controls current flowing through the leg and thereby controlling gain of the delay stage. The VCO receives three control signals that affect the amount of delay applied by each delay stage and therefore the VCO output frequency: a first applied to control the power-regulating circuitry, a second applied to at least one transistor gate in the current regulator, and a third applied to at least one transistor body in the current regulator. The power-regulating circuitry has a parallel configuration of a power-regulating transistor, a first capacitor, and a switched-capacitor leg having a second capacitor and a switch for controlling settling time. The capacitors regulate the power supply without a dedicated, opamp-based voltage regulator.

High-resolution oscillator having wide frequency range

In one embodiment, a loss-of-signal detector is provided that is immune to variations in common mode voltage for a received differential input signal. The loss-of-signal detector is configured is to use a reference voltage that depends upon the common mode voltage.

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Santa Cruz, CA, United States of America

Hamid Ghezel