University of Arkansas

Other

Silicon Solar Solutions, LLC

Hameed A Naseem

William David Brown

Ajay Prabhakar Malshe

M Shahidul Haque

Leonard W Schaper

Douglas Arthur Hutchings

Seth Daniel Shumate

Marwan Albarghouti

John H Glezen

Rajan A Beera

A seed layer structure is annealed. The seed layer structure comprises a crystallization catalyst material on a seed semiconductor over a substrate. The seed semiconductor comprises an amorphous portion. Annealing of the seed layer structure converts the amorphous portion into a crystalline portion. The crystalline portion is connected to the substrate by subsurface crystal legs. The crystallization catalyst material formed underneath the crystalline portion by annealing is removed from the underneath of the crystalline portion.

Ultra-large grain polycrystalline semiconductors through top-down aluminum induced crystallization (TAIC)

An oxide or nitride layer is provided on an amorphous semiconductor layer prior to performing metal-induced crystallization of the semiconductor layer. The oxide or nitride layer facilitates conversion of the amorphous material into large grain polycrystalline material. Hence, a native silicon dioxide layer provided on hydrogenated amorphous silicon (a-Si:H), followed by deposited Al permits induced crystallization at temperatures far below the solid phase crystallization temperature of a-Si. Solar cells and thin film transistors can be prepared using this method.

Low temperature production of large-grain polycrystalline semiconductors

A low temperature process for forming a metal doped silicon layer in which a silicon layer is deposited onto a substrate at low temperatures, with a metal doping layer then deposited upon the silicon layer. This structure is then annealed at low temperatures to form a metal doped semiconductor having greater than about 1&#xd7;10dopant atoms per cmof silicon.

Method of doping silicon, metal doped silicon, method of making solar cells, and solar cells

A low temperature process for forming a metal doped silicon layer in which a silicon layer is deposited onto a substrate at low temperatures, with a metal doping layer then deposited upon the silicon layer. This structure is then annealed at low temperatures to form a metal doped semiconductor having greater than about 1&times;10 dopant atoms per cm of silicon.

Method and apparatus for seeding silicon substrates with diamond particles by electrostatic seeding. Method further includes either application of heat to form the particles into a layer, or chemical vapor deposition of diamond layer onto the particles. Disclosed products include silicon substrate having electrostatically affixed diamond particles, silicon substrate having particles at a density of at least 10 particles per cm , and silicon substrate having polycrystalline layer having nucleation density of at least 10 particles per cm .

Process and apparatus for applying charged particles to a substrate, process for forming a layer on a substrate, products made therefrom

Disclosed is an electroplating method and products made therefrom, which in one embodiment includes using a current density J.sub.O, to form a conductive metal layer having a surface roughness no greater than the surface roughness of the underlying member. In another embodiment of electroplating a substrate surface having peaks and valleys, the method includes electroplating a conductive metal onto the peaks to cover the peaks with the conductive metal, and into the valleys to substantially fill the valleys with the conductive metal.

Method of electroplating a substrate, and products made thereby

Disclosed are polished and planarized diamond films and a method and apparatus for polishing and planarizing diamond films. The method generally includes mechanical polishing of the diamond film against a ceramic surface in the presence of a treating agent of potassium nitrate and a polishing agent of potassium hydroxide. The produced films have an average surface roughness on the order of 0.05 microns, a planarization uniformity within eight percent, and are relatively free of process-induced contaminants.

Apparatus for and method of polishing and planarizing polycrystalline

Disclosed is a method of planarizing a diamond film which generally includes orifices in the surface. The method includes first polishing the diamond film surface to reduce the surface roughness. Next, a filler material is applied to the surface of the film to fill the orifices in the film. Finally, the film is polished to remove excess filler material and expose the diamond film surface. Also disclosed are planarized diamond films diamond substrate having a polished surface of both diamond and filler material and a variation in thickness of less than 8 percent.

Growing community of inventors

Fayetteville, AR, United States of America

Hameed A Naseem