Freescale Semiconductor,inc.

Haldane S Henry

Bruce McRae Green

Matthias Passlack

Chun-Li Liu

Karen Elizabeth Moore

Embodiments include methods of making semiconductor devices with low leakage Schottky contacts. An embodiment includes providing a partially completed semiconductor device including a substrate, a semiconductor on the substrate, and a passivation layer on the semiconductor, and using a first mask, locally etching the passivation layer to expose a portion of the semiconductor. Without removing the first mask, a Schottky contact is formed of a first material on the exposed portion of the semiconductor, and the mask is removed. Using a further mask, a step-gate conductor of a second material electrically coupled to the Schottky contact is formed overlying parts of the passivation layer adjacent to the Schottky contact. By minimizing the process steps between opening the Schottky contact window in the passivation layer and forming the Schottky contact material in this window, the gate leakage of a resulting field effect device having a Schottky gate may be substantially reduced.

Methods of making semiconductor devices with low leakage Schottky contacts

Semiconductor devices are provided with dual passivation layers. A semiconductor layer is formed on a substrate and covered by a first passivation layer (PL-). PL-and part of the semiconductor layer are etched to form a device mesa. A second passivation layer (PL-) is formed over PL-and exposed edges of the mesa. Vias are etched through PL-and PL-to the semiconductor layer where source, drain and gate are to be formed. Conductors are applied in the vias for ohmic contacts for the source-drain and a Schottky contact for the gate. Interconnections over the edges of the mesa couple other circuit elements. PL-avoids adverse surface states near the gate and PL-insulates edges of the mesa from overlying interconnections to avoid leakage currents. An opaque alignment mark is desirably formed at the same time as the device to facilitate alignment when using transparent semiconductors.

Transistors with dual layer passivation

Embodiments include semiconductor devices with low leakage Schottky contacts. An embodiment is formed by providing a partially completed semiconductor device including a substrate, a semiconductor on the substrate, and a passivation layer on the semiconductor, and using a first mask, locally etching the passivation layer to expose a portion of the semiconductor. Without removing the first mask, a Schottky contact is formed of a first material on the exposed portion of the semiconductor, and the first mask is removed. Using a further mask, a step-gate conductor of a second material electrically coupled to the Schottky contact is formed overlying parts of the passivation layer adjacent to the Schottky contact. By minimizing the process steps between opening the Schottky contact window in the passivation layer and forming the Schottky contact material in this window, the gate leakage of a resulting field effect device having a Schottky gate may be substantially reduced.

Semiconductor devices with low leakage Schottky contacts

Semiconductor devices () and methods (-) are provided with dual passivation layers (). A semiconductor layer () is formed on a substrate () and covered by a first passivation layer (PL-) (). PL-() and part () of the semiconductor layer () are etched to form a device mesa (). A second passivation layer (PL-) () is formed over PL-() and exposed edges () of the mesa (). Vias () are etched through PL-() and PL-() to the semiconductor layer () where source (), drain () and gate are to be formed. Conductors () are applied in the vias () for ohmic contacts for the source-drain () and a Schottky contact () for the gate. Interconnections () over the edges () of the mesa () couple other circuit elements. PL-() avoids adverse surface states () near the gate and PL-() insulates edges () of the mesa () from overlying interconnections () to avoid leakage currents (). An opaque alignment mark () is desirably formed at the same time as the device () to facilitate alignment when using transparent semiconductors ().

Transistor and method with dual layer passivation

Methods and apparatus are described for semiconductor devices. A method comprises providing a partially completed semiconductor device including a substrate, a semiconductor on the substrate, and a passivation layer on the semiconductor, and using a first mask, locally etching the passivation layer to expose a portion of the semiconductor, and without removing the first mask, forming a Schottky contact of a first material on the exposed portion of the semiconductor, then removing the first mask, and using a further mask, forming a step-gate conductor of a second material electrically coupled to the Schottky contact and overlying parts of the passivation layer adjacent to the Schottky contact. By minimizing the process steps between opening the Schottky contact window in the passivation layer and forming the Schottky contact material in this window, the gate leakage of a resulting field effect device having a Schottky gate may be substantially reduced.

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Scottsdale, AZ, United States of America

Haldane S Henry