Teledyne Scientific and Imaging, LLC

Teledyne Licensing, LLC

Hakan Durmus

Atul Joshi

Vincent Douence

Stefan Clemens Lauxtermann

A fast-settling line driver circuit capable of high-speed operation. The line driver is particularly well-suited for operation in a high-resolution imaging system. The line driver circuit comprises a signal amplifier that is configured in a negative feedback loop and connected to a bus line through a switch network. The switch network is disposed inside the feedback loop while the line driver is transmitting a signal onto the bus line. This configuration reduces the settling time of the line driver by substantially eliminating the effect of the switch resistance on the RC time constant. The line driver also comprises offset cancellation and presettle circuits that improve the integrity of the output signal and reduce the power consumption of the system.

Fast-settling line driver design for high resolution video IR and visible images

An actuator and method for MEMS array actuation is disclosed. In one embodiment, the actuator having a pixel coupled to a charge integration circuit, the pixel comprising a voltage bias, a variable gap capacitor, and a switch, all in series, the charge integration circuit configured to modulate charge on the variable gap capacitor during an actuation cycle. In one embodiment, the MEMS actuator having a unit cell with parasitic capacitance and coupled to a negative feedback sampling circuit, the unit cell comprising a variable gap capacitor, a voltage bias, a modulated current source, and a voltage-to-current converter, the negative feedback sampling circuit configured to receive an output current from the unit cell, convert the output current from the unit cell to a low voltage signal, sample the low voltage signal, and provide a feedback signal to the modulated current source to compensate for the parasitic capacitance in the unit cell.

System and method for MEMS array actuation including a charge integration circuit to modulate the charge on a variable gap capacitor during an actuation cycle

Fast-settling line driver design for high resolution video IR and visible imagers

A high-order delta-sigma analog-to-digital converter. A plurality of stages are connected to accept an analog input signal and produce a digital output signal. Each stage has a resettable &#x394;-&#x3a3; converter of second order or higher. Resetting each stage before accepting a new input purges the integrators of any information related to the previous input, allowing step inputs to the system. The stability of the converter is ensured using local feedback loops at each stage. Each stage provides a digital representation of a portion of the analog input signal. A decimation filter receives the digital signals from the stages and arranges them into the digital output signal.

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Los Angeles, CA, United States of America

Hakan Durmus