Samsung Electronics Co., Ltd.

Hajung Park

Jaehyun Park

Junhan Bae

Gyeongseok Song

Hobin Song

Ho-Bin Song

Yungeun Nam

Byeonggyu Park

Kyeong-Joon Ko

A device includes a receiver analog front-end circuit including a path shared by an internal loopback current path and a calibration current path, wherein the receiver analog front-end circuit is configured to perform an internal test using the internal loopback current path while in a test mode, and equalize a first data signal while in a normal mode, the equalizing the first data signal including removing an offset from the first data signal using the calibration current path.

Continuous time linear equalizer and device including the same

Disclosed is an integrated circuit including a first bias current generating circuit. The first bias current generating circuit includes a first amplifier receiving a reference voltage and a first voltage and amplifying a difference between them to output a first output voltage, a first bias current generator receiving the first output voltage and outputting a first bias current in response to the first output voltage, a variable resistor receiving the first bias current and outputting the first voltage in response to the first bias current and a calibration code, a second bias current generator receiving the first output voltage and outputting a second bias current to a peripheral circuit in response to the first output voltage, and a third bias current generator receiving the first output voltage and outputting a third bias current to an external device through a first pad in response to the first output voltage.

Integrated circuit using bias current, bias current generating device, and operating method for the same

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Suwon-si, South Korea

Hajung Park