Novellus Systems Incorporated

Lam Research Corporation

Haiying Fu

Qingguo Wu

David Mordo

Steven T Mayer

Xingyuan Tang

David W Porter

Dong Niu

Ananda K Bandyopadhyay

Bryan L Buckalew

Thomas Anand Ponnuswamy

Easwar Srinivasan

Seon-Mee Cho

Robert Rash

David Charles Smith

Matthew S Thorum

Yongsik Yu

Feng Wang

Brian Lu

William Crew

Michael Carris

Karen Billington

Lee J Brogan

Hilton Diaz Camilo

Bart Jan Van Schravendijk

Mandyam Sriram

Jon Henri

Seshasayee Varadarajan

Pramod Subramonium

James Samuel Sims

Sirish K Reddy

Joseph Richardson

Ka Shun Wong

Jonathan David Reid

Patrick A Van Cleemput

Shantinath Ghongadi

Jengyi Yu

Somnath S Nag

Adrianne K Tipton

Frederick Dean Wilmot

Mark J Willey

Tighe A Spurlin

Robert Marshall Stowell

Michelle T Schulberg

James E Duncan

Atul Gupta

Ludan Huang

Charles Lorenzo Merrill

Sanjeev Jain

Honghong Wang

Judy Hsiu-Chih Huang

Hyosang S Lee

Methods and apparatus for electroplating material onto a substrate are provided. In many cases the material is metal and the substrate is a semiconductor wafer, though the embodiments are no so limited. Typically, the embodiments herein utilize a porous ionically resistive plate positioned near the substrate, the plate having a plurality of interconnecting 3D channels and creating a cross flow manifold defined on the bottom by the plate, on the top by the substrate, and on the sides by a cross flow confinement ring. During plating, fluid enters the cross flow manifold both upward through channels in the plate, and laterally through a cross flow side inlet positioned on one side of the cross flow confinement ring. The flow paths combine in the cross flow manifold and exit at the cross flow exit, which is positioned opposite the cross flow inlet. These combined flow paths result in improved plating uniformity.

Enhancement of electrolyte hydrodynamics for efficient mass transfer during electroplating

The embodiments herein relate to methods and apparatus for determining whether a particular test bath is able to successfully fill a feature on a substrate. In various cases, the substrate is a semiconductor substrate and the feature is a through-silicon-via. Generally, two experiments are used: a first experiment simulates the conditions present in a field region of the substrate during the fill process, and the second experiment simulates the conditions present in a feature on the substrate during the fill process. The output from these experiments may be used with various techniques to predict whether the particular bath will result in an adequately filled feature.

TSV bath evaluation using field versus feature contrast

The embodiments herein relate to methods and apparatus for electroplating one or more materials onto a substrate. In many cases the material is a metal and the substrate is a semiconductor wafer, though the embodiments are no so limited. Typically, the embodiments herein utilize a channeled plate positioned near the substrate, creating a cross flow manifold defined on the bottom by the channeled plate, on the top by the substrate, and on the sides by a cross flow confinement ring. During plating, fluid enters the cross flow manifold both upward through the channels in the channeled plate, and laterally through a cross flow side inlet positioned on one side of the cross flow confinement ring. The flow paths combine in the cross flow manifold and exit at the cross flow exit, which is positioned opposite the cross flow inlet. These combined flow paths result in improved plating uniformity.

Apparatus and methods for electroplating metal onto substrates are disclosed. The electroplating apparatus comprise an electroplating cell and at least one oxidization device. The electroplating cell comprises a cathode chamber and an anode chamber separated by a porous barrier that allows metal cations to pass through but prevents organic particles from crossing. The oxidation device (ODD) is configured to oxidize cations of the metal to be electroplated onto the substrate, which cations are present in the anolyte during electroplating. In some embodiments, the ODD is implemented as a carbon anode that removes Cu(I) from the anolyte electrochemically. In other embodiments, the ODD is implemented as an oxygenation device (OGD) or an impressed current cathodic protection anode (ICCP anode), both of which increase oxygen concentration in anolyte solutions. Methods for efficient electroplating are also disclosed.

Method and apparatus for electroplating semiconductor wafer when controlling cations in electrolyte

The embodiments herein relate to methods and apparatus for detecting whether unwanted metallic deposits are present on a bottom of a substrate holder used in an electroplating apparatus. The presence of such unwanted deposits is harmful to electroplating processes because the deposits scavenge current that is intended to cause electroplating on a substrate. When such current scavenging occurs, the electroplating results on the substrates are poor. For instance, features positioned near the edge of a substrate are likely to plate to an insufficient thickness. Further, where such current scavenging is great, the overall thickness of the material plated on the substrate may be too thin. As such, there is a need to detect when such unwanted deposits are present, such that plating under these poor conditions may be avoided. This detection will help preserve costly wafers.

Detection of plating on wafer holding apparatus

Methods and apparatus for improving mechanical properties of a dielectric film on a substrate are provided. In some embodiments, the dielectric film is a carbon-doped oxide (CDO). The methods involve the use of modulated ultraviolet radiation to increase the mechanical strength while limiting shrinkage and limiting any increases in the dielectric constant of the film. Methods improve film hardness, modulus and cohesive strength, which provide better integration capability and improved performance in the subsequent device fabrication procedures such as chemical mechanical polishing (CMP) and packaging.

Method to improve mechanical strength of low-K dielectric film using modulated UV exposure

Transistor architectures and fabrication processes generate channel strain without adversely impacting the efficiency of the transistor fabrication process while preserving the material quality and enhancing the performance of the resulting transistor. Transistor strain is generated is PMOS devices using a highly compressive post-salicide amorphous carbon capping layer applied as a blanket over on at least the source and drain regions. The stress from this capping layer is uniaxially transferred to the PMOS channel through the source-drain regions to create compressive strain in PMOS channel.

High compressive stress carbon liners for MOS devices

Copper diffusion barrier films having low dielectric constants are suitable for a variety of copper/inter-metal dielectric integration schemes. Copper diffusion barrier films in accordance with the invention are composed of one or more layers of silicon carbide, at least one of the silicon carbide layers having a composition of at least 40% carbon (C), for example, between about 45 and 60% carbon (C). The films' high carbon-content layer will have a composition wherein the ratio of C to Si is greater than 2:1; or &#x3e;3:1; or &#x3e;4:1; or &#x3e;5.1. The high carbon-content copper diffusion barrier films have a reduced effective k relative to conventional barrier materials.

Low-K SiC copper diffusion barrier films

Methods of preparing a carbon doped oxide (CDO) layers having a low dielectric constant are provided. The methods involve, for instance, providing a substrate to a deposition chamber and exposing it to one or multiple carbon-doped oxide precursors having molecules with at least one carbon-carbon triple bond, or carbon-carbon double bond, or a combination of these groups and depositing the carbon doped oxide dielectric layer under conditions in which the resulting dielectric layer has a dielectric constant of not greater than about 2.7. Methods of preparing a low stress porous low-k dielectric material on a substrate are provided. The methods involve the use of a structure former precursor and/or porogen precursor with one or more organic functional groups. In some cases, the structure former precursor has carbon-carbon double or triple bonds. In other cases, one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. In other cases, the structure former precursor has carbon-carbon double or triple bonds and one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. Once the precursor film is formed, the porogen is removed, leaving a porous low-k dielectric matrix with high mechanical strength. Different types of structure former precursors and porogen precursors are described. The resulting low stress low-k porous film may be used as a low-k dielectric film in integrated circuit manufacturing applications.

Methods for producing low stress porous and CDO low-K dielectric materials using precursors with organic functional groups

Methods of preparing a low stress porous low-k dielectric material on a substrate are provided. The methods involve the use of a structure former precursor and/or porogen precursor with one or more organic functional groups. In some cases, the structure former precursor has carbon-carbon double or triple bonds. In other cases, one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. In other cases, the structure former precursor has carbon-carbon double or triple bonds and one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. Once the precursor film is formed, the porogen is removed, leaving a porous low-k dielectric matrix with high mechanical strength. Different types of structure former precursors and porogen precursors are described. The resulting low stress low-k porous film may be used as a low-k dielectric film in integrated circuit manufacturing applications.

Methods for producing low stress porous low-k dielectric materials using precursors with organic functional groups

Methods of preparing a carbon doped oxide (CDO) layer of low dielectric constant and low residual stress involving, for instance, providing a substrate to a deposition chamber and exposing it to an organosilicon precursor containing unsaturated C&#x2014;C bonds or to multiple organic precursors including at least one organosilicon and at least one unsaturated C&#x2014;C bond are provided. The methods may also involve igniting and maintaining a plasma in a deposition chamber using radio frequency power having high and low frequency components with a high percentage of the low frequency component, and depositing the carbon doped dielectric layer under conditions in which the resulting dielectric layer has a residual stress of not greater than, e.g., about 50 MPa, and a dielectric constant not greater than about 3.

Methods for producing low-k carbon doped oxide films with low residual stress

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West Linn, OR, United States of America

Haiying Fu