Applied Materials, Inc.

Hailong Zhou

Gene S Lee

Qian Fu

Shan Jiang

Akhil Mehrotra

Jonathan Sungehul Kim

Abhijit Patil

Rajinder Dhindsa

Mark Joseph Saly

Chi-I Lang

Jeffrey W Anthis

Sean S Kang

Kenji Takeshita

Tong Liu

Nancy Fung

David Knapp

Zohreh Hesabi

Hui Sun

Larry Gao

Liming Yang

Jayoung Choi

Yangchung Lee

Sangjun Park

Radhe Agarwal

Feng Qiao

Junkai He

Iljo Kwak

Taehwan Lee

Chain Lee

A method and system for etching high aspect ratio structures in a semiconducting processing chamber are disclosed herein. In one example, a method of patterning a substrate comprises etching the substrate to form a recess, depositing a passivation layer on sidewalls of the recess, treating the passivation layer, and etching the recess to a second depth. The substrate etch forms a recess to a first depth, the substrate having a mask layer disposed thereon. The treating of the passivation layer is for removal of a clogging material formed from an etch byproduct on the mask layer. The etching the recess to a second depth while maintaining a minimum variation of a recess sidewall width.

Method for etching high aspect ratio structures

A method includes performing a dry etch process to remove a portion of a first layer disposed on a second layer of a stack of alternating layers. The first layer includes a first material and the second layer includes a second material different from the first material, and the dry etch process forms a passivation layer including a byproduct on surfaces of the second material. A amount of first material of the portion of the first layer remains after performing the dry etch process, The method further includes introducing a halide gas to enhance the passivation layer on the surfaces of the second material.

Enhanced etch selectivity using halides

Embodiments of this disclosure include a method of processing a substrate that includes etching a first dielectric material formed on a substrate that is disposed on a substrate supporting surface of a substrate support assembly disposed within a processing region of a plasma processing chamber. The etching process may include delivering a process gas to the processing region, wherein the process gas comprises a first fluorocarbon containing gas and a first process gas, delivering, by use of a radio frequency generator, a radio frequency signal to a first electrode to form a plasma in the processing region, and establishing, by use of a first pulsed-voltage waveform generator, a first pulsed voltage waveform at a biasing electrode disposed within the substrate support assembly. The first pulsed voltage waveform comprises a series of repeating pulsed waveform cycles that each include a first portion that occurs during a first time interval, a second portion that occurs during a second time interval, and a peak-to-peak voltage. The pulsed voltage waveform is substantially constant during at least a portion of the second time interval.

Method of enhancing etching selectivity using a pulsed plasma

A method of etching a hardmask layer formed on a substrate is provided. The method includes supplying an etching gas mixture to a processing region of a processing chamber. A device is disposed in the processing region when the etching gas mixture is supplied to the processing region. The device comprises a substrate and a hardmask layer formed over the substrate. The etching gas mixture comprises a fluorine-containing gas, a silicon-containing gas, and an oxygen-containing gas. The method further includes providing RF power to the etching gas mixture to form a plasma in the processing region. The plasma is configured to etch exposed portions of the hardmask layer.

Method of etching hardmasks containing high hardness materials

Implementations described herein generally relate to an etching process for etching materials with high selectivity. In one implementation, a method of etching a gate material to form features in the gate material is provided. The method includes (a) exposing a cobalt mask layer to a fluorine-containing gas mixture in a first mode to form a passivation film on the cobalt mask layer. The cobalt mask layer exposes a portion of a gate material disposed on a substrate. The method further comprises (b) exposing the portion of the gate material to an etching gas mixture in a second mode to etch the portion of the gate material. The portion of the gate material is etched through openings defined in the cobalt mask layer and the portion of the gate material is etched at a greater rate than the cobalt mask layer having the passivation layer disposed thereon.

Method of enhanced selectivity of hard mask using plasma treatments

Methods for etching a bottom anti-reflective coating (BARC) and/or an anti-reflective coating (ARC) and/or a dielectric anti-reflective coating (DARC) to form high aspect ratio features using an etch process are provided. The methods described herein advantageously facilitate profile and dimension control of features with high aspect ratios through a proper sidewall and bottom management scheme during the bottom anti-reflective coating (BARC) and/or an anti-reflective coating (ARC) and/or a dielectric anti-reflective coating (DARC) open process. In one embodiment, a method for etching a dielectric anti-reflective coating (DARC) layer to form features in the DARC layer includes supplying an etching gas mixture onto a DARC layer disposed on a substrate, wherein the substrate is disposed on a substrate support pedestal assembly disposed in a processing chamber, controlling a temperature of the substrate support pedestal assembly greater than 110 degrees Celsius, and etching the DARC layer disposed on the substrate.

Methods for high temperature etching a material layer using protection coating

Methods for forming high aspect ratio features using an etch process are provided. In one embodiment, a method for etching a dielectric layer to form features in the dielectric layer includes (a) supplying an etching gas mixture during a first mode to etch a portion of a dielectric layer disposed on a substrate while forming a passivation protection in the dielectric layer, wherein the dielectric layer is etched through openings defined in a patterned mask layer disposed on the dielectric layer, (b) supplying an etching gas mixture during a second mode to continue forming the passivation protection in the dielectric layer without etching the dielectric layer, and repeatedly performing (a) and (b) to form features in the dielectric layer until a surface of the substrate is exposed.

Highly selective etching methods for etching dielectric materials

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San Jose, CA, United States of America

Hailong Zhou