Boe Technology Group Co., Ltd.

Chengdu Boe Optoelectronics Technology Co., Ltd.

Chongqing Boe Optoelectronics Technology Co., Ltd.

Beijing Boe Optoelectronics Technology Co., Ltd.

Chongqing Boe Display Technology Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Boe Technology Groupco., Ltd.

Haijun Qiu

Fei Shang

Ming Hu

Rui Wang

Benlian Wang

Zhangtao Wang

Tae Yup Min

Yangpeng Wang

Weinan Dai

Yao Hu

Yang Wang

Tianyi Cheng

Haijun Yin

Shaoru Li

Zhiliang Jiang

Ziyang Yu

Jianpeng Wu

Wenbo Chen

Qiang Tang

Wu Wang

Ren Xiong

Xu Chen

Cong Liu

Seung Moo Rim

Guolei Wang

Weiyun Huang

Chao Zeng

Mengqi Wang

Jaikwang Kim

Qian Xu

Yi Zhang

Yao Huang

Haigang Qing

Yuanyou Qiu

Youngyik Ko

Shuai Hou

Zhuo Xu

Erjin Zhao

Hang Min

Juntao Chen

Yu Wang

Xiangdan Dong

Tingliang Liu

Huijuan Yang

Tinghua Shang

Fan Li

Bo Xu

Na Li

Tiaomei Zhang

Young Yik Ko

Guoqiang Tang

Pan Zhao

Yajie Bai

Chao Kong

Lijun Xiao

Guoqiang Wu

Xianyong Gao

Biao Liu

Guoqiang Ma

Yuanyuan Chai

Siqing Fu

Quanyong Gu

Yuedi He

Wanli Dong

Qingqing Yan

Libin Liu

Wei He

Yang Zhou

Shun Zhang

Shiming Shi

Zhe Li

Tong Zhang

Chang Luo

Zhenhua Zhang

Dawei Wang

Yuanqi Zhang

Wei Hu

Zhidong Wang

Yunsheng Xiao

Hongwei Ma

Liang Gao

Taofeng Xie

Ping Wen

Mingche Hsieh

Xu Lu

Fei Chen

Yang Zeng

Miao Wang

Ni Yang

Sijun Lei

Haoyuan Fan

Yonglin Guo

Qun Ma

Zhizhong Tu

Xinghua Li

Tianci Chen

Yizhen Xu

Xiaolin Wang

Xiaoyan Yang

Jingyi Feng

A display substrate and a display apparatus are provided, the display substrate includes: a base substrate and at least one pixel circuit, at least one first power supply line and at least one electrode connection line provided on the base substrate, adjacent pixel circuits located on a same row as the pixel circuit include a first adjacent pixel circuit and a second adjacent pixel circuit; the at least one pixel circuit includes a fifth transistor, a first electrode of the fifth transistor is electrically connected to the first power supply line, the first electrode of the fifth transistor of the at least one pixel circuit and a first electrode of the fifth transistor of the first adjacent pixel circuit are respectively connected with the electrode connection line.

Pixel circuit, driving method thereof, display substrate and display apparatus

The present disclosure provides an information collection module and an information collection apparatus. The information collection module includes: a substrate including a display region, a light-emitting unit being distributed in the display region; and an induction coil and a rectifying circuitry arranged on the substrate, the induction coil being electrically coupled to electrodes of the light-emitting unit via the rectifying circuitry, the rectifying circuitry being configured to rectify a current.

Information collection module and apparatus with induction coil and a rectifying circuitry

A driving circuit includes a first driving signal generation circuit, a first output control circuit, a first gating circuit, a first first energy storage circuit, a first second energy storage circuit and a first output circuit; N is a positive integer; the first gating circuit controls to write the gating input signal into the first first node under the control of the gating control signal; the first output circuit controls to connect the Nth stage of output driving terminal and the first voltage terminal under the control of the potential of the first second node, and controls to connect the Nth stage of output driving terminal and the second voltage terminal under the control of the potential of the first third control node; the first third control node and the first second control node are different nodes.

Driving circuit, driving method, driving module and display device

The present disclosure relates to the field of display, and discloses a shifting register, a driving method, a gate driving circuit and a display device. The shifting register includes: an input sub-circuit, coupled to a signal input terminal, a first clock signal terminal and a first node; a control sub-circuit, coupled to the first clock signal terminal, a second clock signal terminal, the signal input terminal, a first power terminal, a second power terminal and a second node, where the first power terminal or the second power terminal determines a potential of the second node under the control of the first clock signal terminal, the second clock signal terminal and the signal input terminal; and an output sub-circuit, coupled to the first power terminal, the second power terminal, the first node, the second node and a signal output terminal.

Shifting register with fewer transistors, driving method, gate driving circuit and display device

An array substrate includes a substrate, pixel driving circuits and conductive patterns. In each pixel driving circuit, a first electrode region of a driving transistor, a second electrode region of a data writing transistor and a second electrode region of a first light-emitting control transistor are connected through a conductive connection pattern. The pixel driving circuits are configured as odd-numbered row circuit groups and even-numbered row circuit groups. The odd-numbered row circuit groups and the even-numbered row circuit groups each include pixel driving circuits. An overlapping area of orthographic projections, of the substrate, of a conductive connection pattern and a conductive pattern in at least one pixel driving circuit in an odd-numbered row circuit group is less than an overlapping area of orthographic projections, on the substrate, of a conductive connection pattern and a conductive pattern in at least one pixel driving circuit in an even-numbered row circuit group.

Array substrate and display device

A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit and a voltage control circuit; the driving signal generation circuit generates an Nth stage of driving signal, the output control circuit connects the first control node and the second node under the control of the potential of the first node; the gating circuit controls to write a gating input signal into the first node under the control of a gating control signal; the voltage control circuit controls a potential of the second node according to a potential of the first node; the output circuit connects the output driving terminal and the first voltage terminal under the control of the potential of the second node, and connects the output driving terminal and the second voltage terminal under the control of the potential of the third control node.

Gate driving circuit having a gating circuit, and driving method thereof

A display substrate, a working method thereof, and a display device. The display substrate includes K pixel rows and K is a positive integer greater than 1; at least one pixel row includes an initial signal line, a scan signal line, and a plurality of sub-pixels disposed sequentially along an extension direction of the initial signal line and the scan signal line; the initial signal line includes a third initial signal line, the scan signal line includes a second scan signal line, at least one sub-pixel includes a pixel drive circuit, the pixel drive circuit at least includes a third transistor as a drive transistor and an eighth transistor as an initialization transistor; in at least a pixel row, the eighth transistor is connected with the third initial signal line, the second scan signal line, and a second electrode of the drive transistor.

Display substrate, working method thereof, and display device

A pixel driving circuit () includes: a driving sub-circuit (), a first light-emission control sub-circuit (), a second light-emission control sub-circuit (), a data write sub-circuit (), a compensation sub-circuit () and a first reset sub-circuit (). The driving sub-circuit () includes a control terminal, a first terminal and a second terminal; and in an initialization phase (t) in one display frame of the pixel driving circuit (), a voltage difference between the control terminal of the driving sub-circuit () and the first terminal of the driving sub-circuit () is fixed. A pulse width of the signal of the first reset signal control terminal is adjustable.

Pixel driving circuit and driving method therefor, and array substrate and display apparatus

A pixel arrangement including: first groups of sub-pixels arranged in a first direction, each of the first groups including first sub-pixels and third sub-pixels arranged alternately; and second groups of sub-pixels arranged in the first direction, each of the second groups including third sub-pixels and second sub-pixels arranged alternately. The first groups and the second groups are alternately arranged in a second direction perpendicular to the first direction. The first groups and the second groups are arranged to form third groups of sub-pixels arranged in the second direction and fourth groups of sub-pixels arranged in the second direction. The third groups and the fourth groups are alternately arranged in the first direction. Each of the third groups includes first sub-pixels and third sub-pixels arranged alternately. Each of the fourth groups includes third sub-pixels and second sub-pixels arranged alternately.

Pixel arrangement, manufacturing method thereof, display panel, display device and mask

A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit and an output circuit; the driving signal generation circuit generates and outputs the Nth stage of driving signal; the gating circuit controls to write the gating input signal into the first node; the output control circuit performs a NAND operation on the Nth stage of driving signal and the potential of the second terminal of the output control circuit to obtain a first output signal; the output circuit inverts the first output signal to obtain and provide an output driving signal through the output driving terminal; N is a positive integer.

A driving circuit, a driving method, a driving module and a display device are provided. The driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit, a voltage control circuit and a third control node control circuit. The third control node control circuit is electrically connected to the first node and the third control node respectively, and is configured to control the potential of the third control node according to the potential of the first node.

A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit, a voltage control circuit and a second node control circuit; the driving signal generation circuit generates an Nth stage of driving signal; the output control circuit controls to connect the first control node and the second node under the control of the potential of the first node; the gating circuit writes a gating input signal into the first node under the control of a gating control signal; the voltage control circuit controls a potential of the second node according to the potential of the first node; the second node control circuit controls to connect the second node and the first voltage terminal under the control of the potential of the first node.

A display apparatus includes a display panel, a touch layer, and a flexible printed circuit (FPC) including a main FPC and a bridge FPC. A third soldering region and a fourth soldering region of the bridge FPC are respectively soldered to a first soldering region and a second soldering region of the main FPC. Ends of each first touch connection line are electrically connected to a touch chip and a first touch lead. Ends of each second touch connection line are electrically connected to a pad on the second soldering region and a second touch lead. Ends of each third touch connection line are electrically connected to a pad on the first soldering region and the touch chip. Ends of each touch transfer line are electrically connected to a pad on the third soldering region and a pad on the fourth soldering region.

Display apparatus

A pixel arrangement structure includes: first sub-pixels, second sub-pixels and third sub-pixels, being not overlapped but being spaced apart. The third sub-pixel includes a first edge facing the first sub-pixel, the first sub-pixel includes a second edge facing the third sub-pixel, the third sub-pixel includes a third edge facing the second sub-pixel, and the second sub-pixel includes a fourth edge facing the third sub-pixel, and shapes of the first sub-pixel and the second sub-pixel are circles, the first edge and the second edge are curved edges with a same curvature, the third edge and the fourth edge are curved edges with a same curvature; or shapes of the first sub-pixel and the second sub-pixel are octagons, at least part of the first edge is parallel to at least part of the second edge, at least part of the third edge is parallel to at least part of the fourth edge.

Pixel arrangement structure, organic electroluminescent display panel, metal mask and display device

A pixel circuit includes a data writing sub-circuit, a driving sub-circuit, and one or more potential maintenance sub-circuits. The data writing sub-circuit is coupled to at least a first voltage signal terminal, a data signal terminal, a first scan signal terminal and a first node, and writes a data signal provided by the data signal terminal into the first node under control of at least a first scan signal provided by the first scan signal terminal. The driving sub-circuit is coupled to the first node, a second node and a third node, and creates a path between the second node and the third node under control of a potential at the first node. A potential maintenance sub-circuit is coupled to a circuit node and a reference signal terminal, and maintains a potential at the circuit node through a reference signal provided by the reference signal terminal.

Pixel circuit and driving method thereof, display panel, and display apparatus

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Beijing, China

Haijun Qiu