Huawei Technologies Co., Limited

Alibaba Group Holding Limited

Advanced New Technologies Co., Ltd.

Haibin Wang

Xinyu Hou

Jiangen Liu

Chenghong He

Jie Zhang

Yun Chen

Sheng Chang

Fan Zhou

Jian Ma

Rongyu Yang

Jie Cheng

Xiongli Gu

Xiaosong Cui

Xiaotian Wang

Yanhua Li

Embodiments of the present disclosure disclose a computing device, and are applied to the field of computing devices. In the present disclosure, a virtual interrupt obtained by a host machine is mapped to a physical interrupt of a physical layer, and a virtual interrupt identifier corresponding to the physical interrupt is transferred to a virtual processor by using the physical layer. When a hardware layer transparently transmits the virtual interrupt identifier to the virtual processor, the virtual processor does not need to exit. This decreases a delay caused by exit of the virtual processor when software implements virtual interrupt routing.

System and interrupt handling method

A method, a system, and a computer-readable storage medium for blockchain-based data processing are provided. The method comprises: by a node device of a service acceptance platform, receiving service processing application data of a target user; generating a first shared service processing result and a first private service processing result with respect to a target service data processing entity; sending a first transaction to a blockchain for the first transaction to be recorded in a distributed database of the blockchain upon verification of the first transaction by a plurality of node devices associated with the blockchain according to a consensus mechanism; and sending the first private service processing result to the node device of the target service data processing entity, for the node device of the target service data processing entity to generate a second service processing result.

Method and device for data processing based on blockchain

A computer device and a method for reading or writing data by a computer device are provided. In the computer device, a central processing unit (CPU) is connected to a cloud controller using a double data rate (DDR) interface. Because the DDR interface has a high data transmission rate, interruption of CPU can be avoided. In addition, the CPU converts a read or write operation request into a control command and writes the control command into a transmission queue in the cloud controller. Because the cloud controller performs a read operation or a write operation on a network device according to operation information in the control command, after writing the control command into the transmission queue, the CPU does not need to wait for an operation performed by the cloud controller and can continue to perform other processes.

Computer device and method for reading or writing data by computer device

One or more embodiments of the present specification provide blockchain-based data processing methods and apparatuses that are applied to a blockchain network system that includes a node device of a service platform and a node device of a service provider. The method includes sending first transaction data by the blockchain node device of the service platform; obtaining, by the blockchain node device of the service platform, second transaction data where the second transaction data is generated by a blockchain node device of a service provider; checking whether the blockchain node device of the service platform receives the service processing data; executing predetermined service processing data acquisition logic or executing application logic for the service processing data if the blockchain node device of the service platform does not or does, respectively, receive the service processing data.

Blockchain-based data processing

A network distance prediction method and apparatus, wherein the method includes communicating, with at least two reference nodes, to determine values of at least some elements in a local distance matrix; constructing, the local distance matrix based on the values of the at least some elements in the local distance matrix; performing, low-rank sparse factorization on the local distance matrix to obtain a low-rank matrix; obtaining, values of elements in a first element set of the low-rank matrix, to use the values as target values of network distances between the to-be-positioned node and the at least two reference nodes; communicating, with the reference nodes, to obtain coordinates of the reference nodes in a network coordinate system; and determining, coordinates of the to-be-positioned node.

Network distance prediction method and apparatus

A computer subsystem and a computer system, where the computer subsystem includes L composite nodes (CNs), each CN includes M basic nodes, each basic node includes N central processing units (CPUs) and one node controller (NC). Any two CPUs in each basic node are interconnected. Each CPU in each basic node is connected to the NC in the basic node. The NC in each basic node has a routing function. Any two NCs in the M basic nodes are interconnected. A connection between the L CNs formed through connections between NCs enables communication between any two NCs to be no more than three hops. Hence, the computer subsystem and the computer system can reduce the kinds and the number of interconnection chips, and simplify an interconnection structure of a system, thereby improving reliability of the system.

Computer subsystem and computer system with composite nodes in an interconnection structure

The present invention provides a computer subsystem and a computer system. The computer subsystem includes L composite nodes, each composite node includes M basic nodes, each basic node includes N central processing units (CPUs) and one node controller. Any two CPUs in each basic node are interconnected. Each CPU in each basic node is connected to the node controller in the basic node. The node controller in each basic node has a routing function. Any two node controllers in the M basic nodes are interconnected. A connection between the L composite nodes formed through connections between node controllers enables communication between any two node controllers to be no more than three hops. The computer subsystem and the computer system according to embodiments of the present invention can reduce the kinds and the number of interconnection chips, and simplify an interconnection structure of a system, thereby improving reliability of the system.

The present invention provides a computer subsystem and a computer system. The computer subsystem includes L composite nodes, each composite node includes M basic nodes, each basic node includes N central processing units CPUs and one node controller NC, where any two CPUs in each basic node are interconnected, each CPU in each basic node is connected to the NC in the basic node, the NC in each basic node has a routing function, any two NCs in the M basic nodes are interconnected, and a connection between the L composite nodes formed through a connection between NCs enable communication between any two NCs to require at most three hops. The computer subsystem and the computer system according to embodiments of the present invention can reduce the kinds and the number of interconnection chips, and simplify an interconnection structure of a system, thereby improving reliability of the system.

The present invention provides a node routing method of a multi-processor system, a controller and a multi-processor system. The method includes learning a state of an available link between nodes in the multi-processor system, where the multi-processor system includes a first subnet and the first subnet includes at least two connected nodes, and when at least one link in the first subnet fails, reselecting an available link between all nodes in the first subnet, so that the nodes in the first subnet use the reselected available link to route a packet, where the reselected available link is a link on each node in the first subnet except a link whose dimension sequence number is the same as that of the failed link, a dimension sequence number is numbers of a link at two end nodes, and numbers of a link at two end nodes are the same.

Node routing method of multi-processor system, controller and multi-processor system

A system for implementing interconnection fault tolerance between CPUs, a first CPU and a second CPU implements interconnection through a first CPU interconnect device and a second CPU interconnect device. The system adds a data channel between a first SerDes interface of the first CPU interconnect device and a second SerDes interface of the second CPU interconnect device, and transmits link connection state information and a link control signal through the added data channel. The system monitors a link state of any one link in a CPU interconnection system, transmits the link state through the added data channel, recovers any one of the connection links when determining whether any one of the first connection link, the second connection link and the third connection link is faulty.

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Hangzhou, China

Haibin Wang