Samsung Display Co., Ltd.

Hai-Jung In

Bo-Yong Chung

Yong-Sung Park

Ji-Hyun Ka

Dong-Gyu Kim

Jung-Bae Kim

Won Kyu Kwak

Ki Myeong Eom

Kimyeong Eom

Yong-Jae Kim

Hae-Yeon Lee

Kwang Sae Lee

Seunghee Lee

Minku Lee

Il-Hun Jeong

Jinwoo Kim

Bo Yong Chung

Chul Kyu Kang

Naoaki Komiya

Tak-Young Lee

Hyoungwook Jang

Min Jeong Kim

Jae-Jin Song

Jae-Sic Lee

Kyonghwan Oh

Min-Hyuk Choi

Soon-Gi Kwon

Hyun Ji Cha

Weonjun Choe

Sungmin Son

Hyeongjun Jin

ChulKyu Kang

Il-Hoon Jeong

A display panel includes a pixel connected to a scan line and a data line, and a lighting test circuit which provides a lighting test voltage to the pixel through the data line. The lighting test circuit includes a first test transistor including a first electrode which receives the lighting test voltage, a second electrode and a gate electrode which receives a first test control signal, and a second test transistor including a first electrode connected to the second electrode of the first test transistor, a second electrode connected to the data line and a gate electrode which receives a second test control signal.

Display panel and display device including the same

A driver includes first to Mstages, where a first input signal and a second input signal are input to each of the first to Mstages, and each of the first to Mstages outputs a stage output signal, a first carry signal, and a second carry signal, where M is a natural number greater than or equal to 2. The first carry signal and the second carry signal output from a kth stage are the first input signal and the second input signal, which are input to a (k+1)th stage, respectively, where k is a natural number greater than or equal to 1 and less than M, and the first input signal and the second input signal, which are input to a first stage, are a first start signal and a second start signal which are alternately changed for predetermined frame times, respectively.

Driver and display device including the same

A gate driver includes: a pull-up circuit configured to pull up a gate output signal to a high voltage in response to a signal at a first node of the pull-up circuit; a first pull-down circuit configured to pull down the gate output signal to a low voltage in response to a signal at a second node of the first pull-down circuit; a second pull-down circuit configured to pull down the gate output signal to the low voltage in response to a signal at a third node of the second pull-down circuit; a first selection circuit configured to activate the first pull-down circuit and deactivate the second pull-down circuit based on a first selection signal; and a second selection circuit configured to activate the second pull-down circuit and deactivate the first pull-down circuit based on a second selection signal.

Gate driver including pull-up circuit and pull-down circuit and display apparatus including the same

A gate driver includes a carry signal generating circuit and a shift register circuit. The carry signal generating circuit receives a vertical start signal and outputs first and second carry signals. The shift register circuit receives the first and second carry signals and outputs a first stage first carry signal, a first stage second carry signal and a first stage gate output signal. The carry signal generating circuit includes a first carry generator generating the first carry signal and a second carry generator generating the second carry signal. The shift register circuit includes a first stage first carry generator generating the first stage first carry signal, a first stage second carry generator generating the first stage second carry signal and a first stage output buffer outputting the first stage gate output signal.

Gate driver and display apparatus including the same

An emissive display device includes: a light emitting diode; an n-type driving transistor comprising a first driving gate electrode, a first electrode receiving a driving voltage, a second electrode transferring an output current to the anode, and a second driving gate electrode; a second transistor connected to a data line; a third transistor configured to connect the first electrode and the first driving gate electrode of the driving transistor; a storage capacitor comprising a first storage electrode and a second storage electrode connected to the first driving gate electrode; a ninth transistor transferring an overlapping electrode voltage to the second driving gate electrode; an overlapping electrode voltage line crossing the data line and receiving the overlapping electrode voltage; and a shielding electrode at an intersection of the data line and the overlapping electrode voltage line and between the data line and the overlapping electrode voltage line.

Emissive display device

An emission driver includes a plurality of stages. A stage of the plurality of stages receives a start signal, a first clock signal, a second clock signal, a protection signal, a first gate power voltage and a second gate power voltage and outputs an emission signal. The stage of the plurality of stages includes a pull-up switching element connected between a first gate power voltage terminal which receives the first gate power voltage and an emission signal output terminal which outputs the emission signal, a pull-down switching element connected between a second gate power voltage terminal which receives the second gate power voltage and the emission signal output terminal and a protection switching element which applies the first gate power voltage to a control electrode of the pull-down switching element in response to the protection signal.

Emission driver, display apparatus including the same and method of driving display apparatus

A light emitting display device includes: a light emitting diode at a display area, and including an anode and a cathode; a pixel circuit at the display area, and to transmit an output current to the anode of the light emitting diode; a repair line extending in a first direction; a repair pixel circuit connected to the repair line; a bridge including one end overlapping with the repair line; and a connecting portion connected to the anode, and including one end overlapping with the bridge. The bridge is not connected to the repair line, the connecting portion, and the anode.

Light emitting panel

A repair pixel and a display apparatus including the repair pixel, the display panel including a repair pixel for a pixel row or a plurality of repair pixels for a pixel row so that repair may be performed using the repair pixel when a bad pixel occurs in the corresponding pixel row. The bad pixel is repaired using the repair pixel so that the yield of the display panel may be enhanced.

Repair pixel and display apparatus having the same

A biometric information detecting device includes a measurer, a determiner, a controller, and a processor. The measurer measures biometric information of a user as an electrical signal. The determiner is connected to the measurer to receive the electrical signal, processes the electrical signal according to a first reference condition to output a first result signal, and processes the electrical signal according to a second reference condition to output a second result signal. The controller controls the determiner such that the determiner is operated in the first reference condition or the second reference condition, and the processor processes the first and second result signals to obtain the biometric information of the user.

Biometric information detecting device and display apparatus having the same

A display device includes a display panel, a data driver which provides data voltages to the display panel, and a controller which provides output image data to the data driver. The controller includes a data line memory which stores input image data for each pixel row of the display panel, an address line memory which stores addresses for the input image data, and a data serialize block which generates the output image data provided to the data driver by rearranging the input image data stored in the data line memory based on the addresses stored in the address line memory.

Data driver and display device including a data driver

A display device including: a substrate including a display area and a peripheral area peripheral to the display area; a plurality of pads disposed in a pad area, wherein the pad area is disposed in the peripheral area and the pad area includes an integrated circuit (IC); and a first crack detecting line connected to a first pad and a second pad at a first node, and a third pad at a second node, wherein the first crack detecting line is disposed in the peripheral area between the first node and the second node.

Display device and a testing method thereof

A display panel of an organic light emitting diode (OLED) display device having a display region includes a plurality of first pixels located at an upper half of the display region, a plurality of second pixels located at a lower half of the display region, a plurality of first data lines extending in a first direction, and coupled to the plurality of first pixels, a plurality of second data lines extending in the first direction, disposed alternately with the plurality of first data lines along a second direction crossing the first direction, and coupled to the plurality of second pixels, and a demultiplexing circuit configured to selectively couple a plurality of data channels of a data driver of the OLED display device to the plurality of first data lines or the plurality of second data lines.

Display panel of an organic light emitting diode display device, and organic light emitting diode display device

A display apparatus includes: a display panel; a driving circuit which provides a driving signal to the display panel and includes at least one driving transistor; and a clock signal wiring for providing a clock signal to the driving circuit. The driving circuit includes an active pattern, a gate pattern, a source pattern, and a shielding pattern, the gate pattern overlaps the active pattern in a plan view, a major surface plane of the source pattern is disposed in a layer different from a layer the active pattern is disposed in, the source pattern is electrically connected to the active pattern, the shielding pattern is disposed between the gate pattern and the clock signal wiring and applied with a constant voltage, and the clock signal wiring overlaps the gate pattern in the plan view and is disposed on the source pattern.

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Seoul, South Korea

Hai-Jung In