Infineon Technologies Ag

Broadcom Corporation

Hai Jie Wu

Yow Ching Cheng

Chin Yeong Koh

Jing Sun

Kiat How Tan

A method and apparatus is disclosed that is capable of transmitting video signals and/or audio signals using the HDMI interface standard or the DisplayPort interface standard. A dual mode transmitter is disclosed that is configurable to transmit to a first sink device, configured in accordance with a HDMI display interface, in a HDMI mode of operation and/or a second sink device, configured in accordance with a DisplayPort display interface, in a DisplayPort mode of operation. The dual mode transmitter is configured to receive a biasing current from the first sink device in the HDMI mode of operation or to internally provide the biasing current in DisplayPort mode of operation by selecting impedances from selectable impedance networks. The dual mode transmitter is configured to transmit the video signals and/or audio signals by biasing one or more transistors using the biasing current.

HDMI and displayport dual mode transmitter

The present invention provides a tunable oscillator. A voltage-to-current converter receives as input a voltage from a phase-locked loop and outputs a first current. A current-controlled oscillator receives the first current and outputs a frequency responsive to the voltage. A second current is input into the current-controlled oscillator to adjust the gain of the current-controlled oscillator. A third current is input into the voltage-to-current converter to adjust the first current and the gain of the voltage-to-current converter. The second and third current values are set using a two-stage pre-calibration method. During the pre-calibration, a control circuit adjusts and then sets the second and third currents so that the output frequency spans a lock-in frequency range required by the phase-locked-loop over a voltage range spanning voltage tolerance of a loop capacitor of the phase-locked-loop.

Self-calibrated constant-gain tunable oscillator

A delay locked loop (DLL) includes a delay unit configured to delay an input clock signal by a specified amount to produce a delayed clock signal. A phase detector receives as input the input clock signal and the delayed clock signal and outputs a signal proportional to the phase difference between the input clock signal and the delayed clock signal to provide a control voltage for adjusting the delay to the specified amount. A pulse swallower removes a pulse from the input clock signal or from the delayed clock signal to reverse the direction of the control signal.

Reset-free delay-locked loop

The present invention provides a current controlled oscillator comprising a first section providing a first differential output and a second section providing a second differential output. A loading structure comprised of resistive and reactive elements electrically connects the first differential output with the second differential output. The resistive and reactive elements have values chosen such that the resistive elements substantially extend the linear operating frequency range of the current controlled oscillator. Transistors of the loading structure have which are tied to a power supply rejection ratio compensation section for compensating for variations in power supply voltage.

Growing community of inventors

Singapore, Singapore

Hai Jie Wu