Samsung Electronics Co., Ltd.

Hagyoul Bae

Jinseong Heo

Seunggeol Nam

Taehwan Moon

Sangwook Kim

Kwanghee Lee

Yunseong Lee

Dukhyun Choe

Sanghyun Jo

HyunJae Lee

Hyunjae Lee

Provided is a semiconductor device including a first semiconductor transistor including a semiconductor channel layer, and a metal-oxide semiconductor channel layer, and having a structure in which a second semiconductor transistor is stacked on the top of the first semiconductor transistor. A gate stack of the second semiconductor transistor and the top of a gate stack of the first semiconductor transistor may overlap by greater than or equal to 90%. The first semiconductor transistor and the second semiconductor transistor may have a similar level of operation characteristics.

Complementary metal oxide semiconductor device

Provided are a ferroelectric semiconductor device and a method of extracting a defect density of the same. A ferroelectric electronic device includes a first layer, an insulating layer including a ferroelectric layer and a first interface that is adjacent to the first layer, and an upper electrode over the insulating layer, wherein the insulating layer has a bulk defect density of 10cmeVor more and an interface defect density of 10cmeVor more.

Ferroelectric semiconductor device and method of extracting defect density of the same

Provided is a content-addressable memory. The content-addressable memory may include a memory cell connected to a match line, a word line, and a search line, and the memory cell includes a first channel layer and a second channel layer doped with different dopants.

Content-addressable memory and electronic device including the same

Disclosed are a non-volatile content addressable memory device having a simple cell configuration and/or an operating method thereof. The non-volatile content addressable memory device includes a plurality of unit cells, wherein each of the plurality of unit cells consists of or includes a first ferroelectric transistor and a second ferroelectric transistor The first and second ferroelectric transistors are of different types such as different electrical types from each other. The first and second ferroelectric transistors may be connected in series or in parallel to each other. The first and second ferroelectric transistors may share one word line and one match line. The first and second ferroelectric transistors may share one search line. One of the first and second ferroelectric transistors may be connected to a search line and the other one may be connected to a bar search line. The first and second ferroelectric transistors may share one match line.

Non-volatile content addressable memory device having simple cell configuration and operating method of the same

A semiconductor apparatus includes a plurality of semiconductor devices. The semiconductor devices each include a ferroelectric layer, a conductive metal oxide layer, and a semiconductor layer, between two electrodes. The conductive metal oxide layer may be between the ferroelectric layer and the semiconductor layer. The ferroelectric layer, the conductive metal oxide layer, and the semiconductor layer may all include a metal oxide. The conductive metal oxide layer may include one or more materials selected from the group consisting of an indium oxide, a zinc oxide, a tin oxide, and any combination thereof.

Semiconductor device

Provided is a ferroelectric semiconductor device including a source and a drain having different polarities. The ferroelectric semiconductor may include a ferroelectric including zirconium oxide (ZrO), hafnium oxide (HfO), and/or hafnium-zirconium oxide (HfZrO, 0<x<1). The semiconductor device may have memory-like characteristics.

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Hanam-si, South Korea

Hagyoul Bae