Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Haeng-Won Park

Seung-Hwan Moon

Nam-Soo Kang

Yong-Soon Lee

Dong-Gyu Kim

Sung-Man Kim

Seong-Young Lee

Sung-jae Moon

Woon-Yong Park

Bong-Jun Lee

Beom-jun Kim

Po-Yun Park

Hyeong-Jun Park

Back-Won Lee

Shin-Tack Kang

Jung-Hee Lee

Jong-Seon Kim

Man-Bok Cheon

Yeon-Kyu Moon

Keun-Shik Nah

Dal-Jung Kwon

Myung-Ho Won

Hyeon-Seok Bae

Ho-Sup Choi

Seung-Hoon Jung

A gate driver includes multiple stages. Each stage has a circuit portion and a wiring portion. The wiring portion delivers first and second clock signals to the circuit portion. Further, the wiring portion includes first and second clock wirings receiving the first and second clock signal, respectively, first connecting wirings electrically connecting the first clock wiring with a first every other stage, and second connecting wirings electrically connecting the second clock wiring with the odd-numbered stages. Further, the wiring portion includes third connecting wirings electrically connecting the first connecting wiring with a second every other stage and fourth connecting wirings electrically connecting the second connecting wiring with the even-numbered stages. This configuration may prevent the gate driver from operating erroneously and reduce power consumed by the gate driver.

Driving unit and display device having the same

Gate-driving circuitry of a thin film transistor array panel is formed on the same plane as a display area of the transistor array panel. The gate-driving circuitry includes driving circuitry and signal lines having apertures. Thus, a sufficient amount of light, even though illuminated from the thin film transistor array panel side, can reach a photosetting sealant overlapping at least in part the gate-driving circuitry. The thin film transistor array panel and the counter panel are put together air-tight and moisture-tight. Consequently, the gate-driving circuitry can avoid corrosion by moisture introduced from outside. Gate-driving circuitry malfunctions can also be reduced.

Thin film transistor array panel and display device including the same

A method of driving a display panel includes generating a reference gate signal delayed by a predetermined period from a gate signal applied to a gate line disposed in a first end area of the display panel, the first end area being an area in which a RC delay of a data line is the smallest, receiving an input gate signal applied to a gate line disposed in a second area of the display panel, the second area being an area in which the RC delay of the data line is the largest; and selectively controlling a delay time of each of the plurality of gate signals applied to each of the plurality of gate lines according to a result of comparison between the reference gate signal and the input gate signal.

Method of driving display panel and display apparatus

Gate driving unit and display device having the same

A display device includes pixels, each including a switching element; a shift register comprising stages coupled with the switching elements and sequentially generating output signals; clock signal lines transmitting clock signals; at least a control signal line transmitting a control signal; and terminal lines connecting the clock signal lines and the control signal with the stages, wherein the terminal lines comprise at least one common terminal line commonly connected with at least two stages.

Display device having improved gate driver

A display device including a plurality of pixel electrodes arranged in a matrix including rows and columns and a plurality switching elements coupled with the pixel electrodes; a plurality of gate lines coupled with the switching elements and extending in a row direction, at least two gate lines assigned to a row; and a plurality of data lines coupled with the switching elements and extending in a column direction, a data line assigned to at least two columns, wherein each of the pixel electrodes has a first side and a second side that is farther from a data line than the first side, and the switching elements are disposed near the second sides of the pixel electrodes.

Display device

A transistor includes a control electrode, a first current electrode and a second current electrode. The control electrode includes a body portion, and first and second hand portions protruded from first and second ends of the body portion, respectively. The first current electrode is electrically insulated from the control electrode and disposed over a region between the first and second hand portions of the control electrode. A portion of the first current electrode is overlapped with a portion of the control electrode. The second current electrode is electrically insulated from the control electrode and partially overlapped with the body portion, the first hand portion and the second hand portion of the control electrode. Therefore, parasitic capacitance is reduced.

Transistor and display device having the same

A display device that employs fewer IC chips and lends itself to cost-efficient manufacturing is presented. The device includes: a plurality of pixel rows including first and second pixels alternately arranged; a plurality of first and second gate lines disposed above and below the pixel rows and applying first and second gate-on voltages to the first and the second pixels, respectively; data lines intersecting the first and the second gate lines, each data line disposed between the first and the second pixels in a pair of first and second pixels and applying data voltages to the first and the second pixels; first and second gate drivers applying the first and the second gate-on voltages to the first and the second gate lines; and a data driver applying the data voltages to the data lines, wherein the second gate-on voltage is applied earlier than the first gate-on voltages by a predetermined time.

Display device and driving method thereof

A display device including a plurality of pixels is provided, which includes: a signal controller for processing image data for the pixels from an external source; a plurality of pad areas, each pad area provided with a plurality of conductors for transmission of the image data, the conductors of adjacent two of the pad areas having a correspondence; and a plurality of interconnections connecting the corresponding conductors, wherein each conductor in each pad area transmits one of bits of the image data and the corresponding conductors are arranged in reversed order on the respective pad areas. The display device further includes a plurality of data driver units connected to the respective pad areas and sequentially activated to receive respective image data from the pad areas under control of the signal controller, the data driver units converting the received image data into analog voltages and provides the analog voltage for the pixels under control of the signal controller.

Display device and circuit board therefor including interconnection for signal transmission

An LCD module includes a user connector part that receives power voltages, image signals and control signals from an external host system and outputs the power voltages, image and control signals through a first integrated type connector and an LCD module having a second integrated type connector connected with the first integrated type connector through an FPC. The LCD module receives power voltages and image and control signals through the second integrated type connector, provides image data signals and timing signals to data lines and provides scan signals to gate lines. Namely, the LCD can receive power voltage, the image signals and control signals through the integrated type connector instead of a plurality of connecting terminals, thereby providing an LCD having slim weight and compact size and reducing the size thereof.

Liquid crystal display module and liquid crystal display apparatus having the same

Disclosed is a liquid crystal display (LCD). An LCD panel is divided into upper and lower panels, and a scanning direction of gate lines of the upper panel is opposite to that of gate lines of the lower panel. The upper panel includes an upper gate line block having a first gate line formed in the horizontal direction and transmits scanning signals, and upper data lines that cross the first gate line and transmit image signals. And the lower panel includes a lower gate line block having a second gate line, and lower data lines that cross the second gate line and are separated from the upper data lines. Upper and lower gate drivers that provide scanning signals to the gate lines of the upper and lower gate line blocks are located on the sides of the upper and lower panels, respectively. The upper and lower gate drivers supply the scanning signals to the gate lines in sequentially opposite directions. According to the present invention, the non-uniform brightness phenomenon can be prevented by making the scanning direction of the gate lines of the upper panel opposite to that of the gate lines of the lower panel.

Growing community of inventors

Seongnam-si, South Korea

Haeng-Won Park