Samsung Electronics Co., Ltd.

Hae-Woon Park

Jong-Kon Bae

Han-Min Cho

Young-Bae Moon

Min-Hwa Jang

Pan-Wook Um

Dong-Hoon Yang

A display drive integrated circuit includes a single full frame memory having a first half frame memory region and a second half frame memory region, a mode determination unit and a control unit. The mode determination unit determines the received image data type (still image or video) and accordingly selects a normal mode or an enhance mode associated with a display quality. The control unit operates in the normal mode or the enhance mode in response to an output of the mode determination unit. In an enhance mode, the control unit divides the single full frame memory into a first half frame memory region and a second half frame memory region to store compressed image data of a current frame in the first half frame memory region and compressed image data of a previous frame in the second half frame memory region.

Display drive integrated circuit

The display device includes a driving circuit and a panel. The driving circuit is configured to generate a source output enable signal having at least one pulse during one horizontal scanning period in response to a mode signal and configured to generate a source driving signal by latching an image data in response to the source output enable signal. The driving circuit is further configured to generate an internal horizontal synchronization signal in response to the source output enable signal and configured to generate a gate driving signal in response to the internal horizontal synchronization signal. The panel is configured to display the image data in response to the gate driving signal and the source driving signal.

Multiple mode driving circuit and display device including the same

Growing community of inventors

Hwaseong-si, South Korea

Hae-Woon Park