Samsung Electronics Co., Ltd.

Hae-wang Lee

Chul-hong Park

Young-Hun Kim

Jae-Seok Yang

Hyoun-Jee Ha

Jung-hyuck Choi

Dong-Hyun Kim

Kwan-Young Chun

Pan-Jae Park

Seon-Ah Nam

Ikuo Nakamatsu

Yun-Se Oh

Ho-Jun Choi

A semiconductor device includes a substrate having cell areas and power areas that are alternately arranged in a second direction. Gate structures extend in the second direction. The gate structures are spaced apart from each other in a first direction perpendicular to the second direction. Junction layers are arranged at both sides of each gate structure. The junction layers are arranged in the second direction such that each of the junction layer has a flat portion that is proximate to the power area. Cutting patterns are arranged in the power areas. The cutting patterns extend in the first direction such that each of the gate structures and each of the junction layers in neighboring cell areas are separated from each other by the cutting pattern.

Semiconductor device and method of manufacturing the same

A semiconductor device includes a first active structure on a substrate including a first epitaxial pattern, a second epitaxial pattern and a first channel pattern between the first epitaxial pattern and the second epitaxial pattern, the first channel pattern including at least one channel pattern stacked on the substrate. A first gate structure is disposed on top and bottom surfaces of the first channel pattern. A second active structure on the substrate and includes the second epitaxial pattern, a third epitaxial pattern and a second channel pattern between the second epitaxial pattern and the third epitaxial pattern in the first direction. The second channel pattern includes at least one channel pattern stacked on the substrate. The number of stacked second channel patterns is greater than the number of stacked first channel patterns. A second gate structure is disposed on top and bottom surfaces of the second channel pattern.

An integrated circuit device may include a fin-type active region extending in a first direction on a substrate; an insulating separation structure extending in a second direction that intersects the first direction on the fin-type active region; a pair of split gate lines spaced apart from each other with the insulating separation structure therebetween and extending in the second direction to be aligned with the insulating separation structure; a pair of source/drain regions located on the fin-type active region and spaced apart from each other with the insulating separation structure therebetween; and a jumper contact located over the insulating separation structure and connected between the pair of source/drain regions.

Integrated circuit device and method of manufacturing the same

A semiconductor device is provided including a substrate, a first gate structure, a first contact plug and a power rail. The substrate includes first and second cell regions extending in a first direction, and a power rail region connected to each of opposite ends of the first and second cell regions in a second direction. The first gate structure extends in the second direction from a boundary area between the first and second cell regions to the power rail region. The first contact plug is formed on the power rail region, and contacts an upper surface of the first gate structure. The power rail extends in the first direction on the power rail region, and is electrically connected to the first contact plug. The power rail supplies a turn-off signal to the first gate structure through the first contact plug to electrically insulate the first and second cell regions.

Semiconductor devices having power rails

A semiconductor device includes active fins on a substrate. Gate lines each extend in the second direction on the active fins. A contact plug is positioned on the active fins. A first via is in one of the first contact plugs. A first conductive line overlaps a first via. A first distance from a first active fin on which a first gate line of the gate lines is formed to an end of the first gate line is more than a predetermined distance. A second distance from a second active fin on which the first gate line is formed to the first active fin of the active fins is equal to or less than the predetermined distance. The second active fin is spaced apart from the first contact plugs to not overlap the first contact plugs.

Growing community of inventors

Yongin-si, South Korea

Hae-wang Lee