Skhynix Inc.

Hynix Semiconductor Inc.

Samsung Display Co., Ltd.

Seoul National University

Hae Chan Park

Se Ho Lee

Heon Yong Chang

Suk Kyoung Hong

Myoung Sub Kim

Seung Yun Lee

Jae Taek Kim

Soo Gil Kim

Jang Won Kim

Se Hyun Lee

Sung Cheoul Kim

Gong Hyun Sa

Kang Sik Choi

Hak Sun Chang

Nam Kyun Park

Tae Ho Kim

Cheol Seong Hwang

Won Jun Lee

Jang Uk Lee

Ja Chun Ku

Jin Joo Ha

Jin Hyock Kim

Min Gyeong Shin

Hye Won Jang

Byung Joon Choi

Jung Won Seo

Ka Young Kim

Sang Chul Oh

Sung Bin Hong

Young Su Lim

A tiled display device includes a plurality of display devices, and an optical member located on the display devices, wherein the optical member includes a base substrate, a plurality of first lenticular lenses located on a lower surface of the base substrate and extending in a first direction, and a plurality of second lenticular lenses located under the first lenticular lenses and extending in a second direction crossing the first direction.

Tiled display device

The present technology relates to a semiconductor device and a method of manufacturing the same. The semiconductor device includes a first stack including first interlayer insulating layers and first conductive patterns which are alternately stacked with one another, a second stack including second interlayer insulating layers and second conductive patterns which are alternately stacked with one another on the first stack, a plurality of channel plugs vertically formed through the first stack and the second stack, and at least one dummy plug vertically formed through the second without passing through the first stack.

Semiconductor device and method of manufacturing the same

The present disclosure relates to a display device. A display device according to an embodiment of the present inventive concept includes gate lines extending along a first direction, data lines extending along a second direction, pixels including pixel electrodes, each of the pixels including a transistor connected to a gate line and a data line, and a pixel electrode connected to the transistor, the pixels including a first pixel which includes a first pixel electrode connected to a first data line and is disposed in npixel row and mpixel column, and a second pixel which includes a second pixel electrode connected to the first data line or a second data line disposed adjacent to the first data line and is disposed in (n+1)pixel row and the mpixel column. The first data line does not overlap the first pixel electrode and overlaps the second pixel electrode.

Display device

A manufacturing method of a semiconductor device may be provided. The method may include forming stacks including interlayer insulating layers and separated by a slit, the interlayer insulating layers surrounding a channel layer and stacked to be spaced apart from one another with an interlayer space interposed therebetween. The method may include forming a conductive pattern filling the interlayer space. The method may include forming an isolation layer on a surface of the conductive pattern by oxidizing a portion of the conductive pattern by performing an oxidizing process.

Manufacturing method of semiconductor device

A semiconductor device includes a stack structure located on a substrate and includes a first region, in which sacrificial layers and insulating layers are alternately stacked, and a second region, in which conductive layers and insulating layers are alternately stacked. The stack structure also includes a first slit insulating layer located at a boundary between the first region and the second region, wherein the first slit insulating layer penetrates the stack structure and extends in one direction. The stack structure further includes a plurality of slit insulating patterns located in the second region, wherein the plurality of slit insulating patterns penetrate the stack structure and are arranged along the one direction. At least one conductive layer among the conductive layers is bent between the first slit insulating layer and the slit insulating patterns.

Semiconductor device and manufacturing method thereof

A data processing system includes a central processing unit (CPU), a control block configured to interface with the CPU, a cache memory configured to interface with the control block and arranged to be spaced from the CPU by a first distance, and a combined memory block configured to interface with the control block, arranged to be spaced from the CPU by a second distance larger than the first distance, and configured of a working memory and a storage memory. The combined memory block is configured of a plurality of stacked memory layers, each configured of a plurality of variable resistance memory cells. The working memory is allocated to one memory layer selected among the plurality of memory layers. The storage memory is allocated to remaining memory layers among the plurality of memory layers.

Data processing system having combined memory block and stack package

A resistive memory device includes a memory cell array including a unit memory cell coupled between a word line and a bit line, wherein the unit memory cell includes a data storage material and a non-silicon-substrate-based type bidirectional access device coupled in series, a path setting circuit coupled between the bit line and the word line, suitable for providing a program pulse toward the bit line or the word line based on a path control signal, a forward write command, and a reverse write command, and a control unit suitable for providing a write path control signal, a forward program command, and a reverse program command based on an external command signal.

Resistive memory device and operation method thereof

A semiconductor apparatus includes a variable resistor including a variable resistance layer, which is formed to surround on an inner surface of a resistive region, and an insert layer which is formed in the variable resistance layer and has a resistivity being different from that of the variable resistance layer.

Semiconductor apparatus and method for fabricating the same

A combined memory block includes a first memory unit configured to store data and an additional memory unit that forms a stacked structure with the memory unit, wherein the memory unit and the storage unit together form multi-level cells having variable resistance in storing data.

Combined memory block and data processing system having the same

A semiconductor integrated circuit device and a method of fabricating the same are disclosed. The semiconductor integrated circuit device includes a resistive layer and an encapsulation film formed to surround an outer wall of the resistive layer. The encapsulation film contains an oxygen absorbing ingredient.

Semiconductor integrated circuit device having encapsulation film and method of fabricating the same

A method for fabricating a semiconductor apparatus includes forming a diffusion barrier film on a semiconductor substrate, forming a first film on a semiconductor substrate including a common source region, forming a second film on the first film, forming a conductive film on the second film, patterning the conductive film and the second film, to form an active pattern, and patterning the first film and the semiconductor substrate using the active pattern as a mask, to form a pillar; and forming a gate electrode on an outer circumference of the pillar.

Method for fabricating semiconductor apparatus

Growing community of inventors

Gyeonggi-do, South Korea

Hae Chan Park