Newport Fab, LLC

Conexant Systems, Inc.

Samsung Electronics Co., Ltd.

Hadi H Abdul-Ridha

David J Howard

Maureen R Brongo

David T Young

Dieter Dornisch

Tinghao Frank Wang

Julia M Wu

Shao-Wen Hsia

According to one embodiment of the invention, a method for fabricating a MIM capacitor in a semiconductor die includes a step of depositing a first interconnect metal layer. The method further includes depositing a high-k dielectric layer comprising AlN(aluminum nitride) on the first interconnect layer. The method further includes depositing a layer of MIM capacitor metal on the high-k dielectric layer. The method further includes etching the layer of MIM capacitor metal to form an upper electrode of the MIM capacitor. According to this exemplary embodiment, the first interconnect metal layer, the high-k dielectric layer, and the layer of MIM capacitor metal can be deposited in a PVD process chamber. The method further includes etching the high-k dielectric layer to form a MIM capacitor dielectric segment and etching the first interconnect metal layer to form a lower electrode of the MIM capacitor.

MIM capacitor high-k dielectric for increased capacitance density

A method of patterning a metal layer in a semiconductor die comprises forming a mask on the metal layer to define an open region and a dense region. The method further comprises etching the metal layer at a first etch rate to form a number of metal segments in the open region and etching the metal layer at a second etch rate to form a number of metal segments in the dense region, where the first etch rate is approximately equal to the second etch rate. The method further comprises performing a number of strip/passivate cycles to remove a polymer formed on sidewalls of the metal segments in the dense region. The sidewalls of the metal segments in the dense region undergo substantially no undercutting and residue is removed from the sidewalls of the metal segments in the dense region.

Densely packed metal segments patterned in a semiconductor die

Method for fabricating a MIM capacitor high-K dielectric for increased capacitance density and related structure

Method for patterning densely packed metal segments in a semiconductor die and related structure

A method for fabrication of ceramic tantalum nitride and improved structures based thereon is disclosed. According to the disclosed method, an ionized metal plasma (&ldquo;IMP&rdquo;) tool is used to create a plasma containing tantalum ions where the plasma is sustained by a mixture of nitrogen and argon gases. The percentage of nitrogen partial flow in the mixture of gases is adjusted so as to result in a layer of tantalum nitride with a nitrogen content of at least 30%. With a nitrogen content of at least 30%, the tantalum nitride becomes ceramic. The ceramic tantalum nitride presents a number of advantages. For example, the fabrication of ceramic tantalum nitride can be easily incorporated into fabrication of semiconductor chips using copper as the interconnect metal. Also, ceramic tantalum nitride can be used as an effective etch stop layer. The reason is that ceramic tantalum nitride does not react with fluoride which is a typical constituent of etchants utilized to etch silicon-based dielectrics such as silicon dioxide. Further, ceramic tantalum nitride can be used as a dielectric in fabrication of a capacitor stack using copper electrodes. Since fabrication of ceramic tantalum nitride is easily assimilated with fabrication of copper, the capacitor stack utilizing ceramic tantalum nitride can be built in a single IMP tool along with the copper electrodes. The result is higher throughput and a reduced risk of contaminating the semiconductor wafer since there is no need to &ldquo;break vacuum&rdquo; for a separate fabrication of the dielectric layer.

Structures based on ceramic tantalum nitride

A process for manufacturing a semiconductor device includes the formation of tungsten contact plugs suitable for very small geometry devices. As part of the process a tungsten barrier layer is deposited into vias and covering the walls of the vias by a process of ionized metal plasma deposition. The tungsten layer deposited in this manner provides a barrier layer, adhesion layer, and nucleation layer for the subsequent chemical vapor deposition of tungsten contact plug material. Together the two layers of tungsten form contact plugs having a low resistance even when used in the fabrication of very small geometry devices.

Semiconductor device and process

Method for fabrication of ceramic tantalum nitride and improved structures based thereon

Growing community of inventors

Irvine, CA, United States of America

Hadi H Abdul-Ridha