United Microelectronics Corp.

Haber Chen

Li-Yeat Chen

Wen-Yi Shieh

Several processes for forming semiconductor gate structures having treated titanium silicide layers are disclosed. There are at least three methods been provided for the present invention and a summarized general procedure of all the methods comprises the following steps: The first step is to provide a silicon substrate having a gate oxide layer formed on top the silicon substrate, and forming a polysilicon layer over the gate oxide layer, followed by the formation of a TiN layer over the polysilicon layer. A treated titanium silicide layer is then formed on top of the TiN layer. Sequentially, an anti-reflection (SiON) film is deposited on top of the treated titanium silicide layer with a capping layer formed over the anti-reflection film. Finally, patterning and etching the above layers to expose a portion of the gate oxide layer and to form a gate electrode, where the final gate structure is rounded up by a rapid thermal process (RTP). The step of forming a treated titanium silicide layer further comprises one of the following: impurity doping by implantation, sputtering with nitrogen gas, and using TiSi.sub.x M.sub.y target. As a result of this, a wider thermal-stress window has been achieved by the present invention.

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Taipei, Taiwan

Haber Chen