Ams Ag

Austriamicrosystems Ag

Günther Koppitsch

Jochen Kraft

Jordi Teva

Franz Schrank

Ewald Stückler

Martin Schrems

Rainer Minixhofer

Cathal Cassidy

Jörg Siegert

Bernhard Löffler

Frederic Roger

Sara Carniello

Stefan Jessenig

Karl Rohracher

Ewald Wachmann

Michael Beutl

Franz Bermann

Sven Schroeter

A cutout (), which penetrates the semiconductor body, is present in the semiconductor body (). A conductor layer (), which is electrically conductively connected to a metal plane () on or over the semiconductor body, screens the semiconductor body electrically from the cutout. The conductor layer can be metal, optionally with a barrier layer (), or a doped region of the semiconductor body.

Method for producing a semiconductor device comprising a conductor layer in the semiconductor body and semiconductor body

The semiconductor device comprises a substrate () of semiconductor material, a contact hole () reaching from a surface () into the substrate, and a contact metallization () arranged in the contact hole, so that the contact metallization forms an internal substrate contact () on the semiconductor material at least in a bottom area () of the contact hole.

Semiconductor device with internal substrate contact and method of production

Through the intermetal dielectric () and the semiconductor material of the substrate () a contact hole is formed, and a contact area of a connection metal plane () that faces the substrate is exposed in the contact hole. A metallization () is applied, which forms a connection contact () on the contact area, a through-contact () in the contact hole and a connection contact () on a contact area facing away from the substrate and/or on a vertical conductive connection () of the upper metal plane ().

Method for producing a semiconductor component with a through-contact and semiconductor component with through-contact

In an insulation layer of an SOI substrate, a connection pad is arranged. A contact hole opening above the connection pad is provided on side walls and on the connection pad with a metallization that is contacted on top side with a top metal.

Method for producing a semiconductor component, and semiconductor component

A polysilicon layer provided for a polysilicon electrode () is patterned by means of a resist mask () and an auxiliary layer () made of a material that is suitable as an antireflection layer, the auxiliary layer () being provided with lateral hollowed-out recesses in such a way that the polysilicon electrode is formed with rounded edges () during etching. The auxiliary layer is preferably produced from a soluble material and with a thickness of 70 nm to 80 nm. A base layer () may be provided as a gate dielectric of memory cell transistors and additionally as an etching stop layer.

Process for manufacturing rounded polysilicon electrodes on semiconductor components

A silicon substrate includes plural partial areas defined on the silicon substrate such that adjacent partial areas are orientated in different directions. The plural partial areas define an insulating layer that extends from a surface of the silicon subtrate into the silicon substrate. Each of the plural partial areas includes first regions that contain silicon dioxide formed by oxidation of silicon in the silicon substrate, and second regions that contain silicon dioxide deposited onto the silicon substrate. The first regions and the second regions are oriented in a substantially same direction and are arranged side-by-side and alternately such that two first regions do not border and two second regions do not border.

Silicon substrate having an insulating layer

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Lieboch, Austria

Günther Koppitsch