Yangtze Memory Technologies Co., Ltd.

Gyuwan Kwon

Sangoh Lim

Hang Song

A memory device includes an input/output (I/O) interface, a first buffer and a second buffer coupled to the I/O interface, and an input buffer controller coupled to the I/O interface. The input buffer controller is configured to in response to receiving a command signal or an address signal from the I/O interface, enable the first buffer to perform a command cycle or an address cycle, and in response to receiving a data signal from the I/O interface, enable the second buffer to perform a data cycle at a speed higher than the command cycle or the address cycle performed by the first buffer.

High-performance input buffer and memory device having the same

A method for operating a memory device includes receiving an input that includes a command signal, an address signal, and a data signal, transmitting the command signal or the address signal to a low speed buffer, and transmitting the data signal to a high speed buffer.

Growing community of inventors

Wuhan, China

Gyuwan Kwon